Other Parts Discussed in Thread: TMS320F28379D, C2000WARE
Tool/software:
Hello Team,
I am facing an issue in the Launchxlf28379D ADC Channels. there are 24 pins for adc in TMS320F28379D microcontroller but on the Development board launchxl there are only 20 out. i am creating a design where i take out the remaining 4 adc pins and i have created a separate jig for it. For the initialization i can do the initialization for 16 adc pins but when i try to initialize all the 24 pins at once i am not able to do it. it seems that i can initializa 4 pins per channel at once.
I have reviewed the header files related adc initialization (F28379D_adc.h). I am using interrupt because i am using a big CAN bus along with this adc functionality. below is my adc initialization, can someone please suggest me the steps for initialize and use all 24 pins at once.
void ConfigureADC(void)
{
EALLOW;
// Configure ADCA
AdcaRegs.ADCCTL2.bit.PRESCALE = 6;
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_SINGLE);
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
// Configure ADCB
AdcbRegs.ADCCTL2.bit.PRESCALE = 6;
AdcSetMode(ADC_ADCB, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_SINGLE);
AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
// Configure ADCC
AdccRegs.ADCCTL2.bit.PRESCALE = 6;
AdcSetMode(ADC_ADCC, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_SINGLE);
AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
//ADCD
AdcdRegs.ADCCTL2.bit.PRESCALE = 6;
AdcSetMode(ADC_ADCD, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_SINGLE);
AdcdRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcdRegs.ADCCTL1.bit.ADCPWDNZ = 1;
DELAY_US(1000);
// Configure SOCs for ADCA
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 3; // ADCINA2
AdcaRegs.ADCSOC0CTL.bit.ACQPS = 25;
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 5; // ADCINA3
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 25;
AdcaRegs.ADCSOC2CTL.bit.CHSEL = 14; // ADCINA4
AdcaRegs.ADCSOC2CTL.bit.ACQPS = 25;
AdcaRegs.ADCSOC3CTL.bit.CHSEL = 15; // ADCINA14
AdcaRegs.ADCSOC3CTL.bit.ACQPS = 25;
// Configure SOCs for ADCB
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2; // ADCB2
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 25;
AdcbRegs.ADCSOC1CTL.bit.CHSEL = 3; // ADCB3
AdcbRegs.ADCSOC1CTL.bit.ACQPS = 25;
AdcbRegs.ADCSOC2CTL.bit.CHSEL = 4; // ADCB4
AdcbRegs.ADCSOC2CTL.bit.ACQPS = 25;
AdcbRegs.ADCSOC3CTL.bit.CHSEL = 5; // ADCB5
AdcbRegs.ADCSOC3CTL.bit.ACQPS = 25;
// Configure SOCs for ADCC
AdccRegs.ADCSOC0CTL.bit.CHSEL = 2; // ADCC2
AdccRegs.ADCSOC0CTL.bit.ACQPS = 25;
AdccRegs.ADCSOC1CTL.bit.CHSEL = 3; // ADCC3
AdccRegs.ADCSOC1CTL.bit.ACQPS = 25;
AdccRegs.ADCSOC2CTL.bit.CHSEL = 4; // ADCC4
AdccRegs.ADCSOC2CTL.bit.ACQPS = 25;
AdccRegs.ADCSOC3CTL.bit.CHSEL = 5; // ADCC5
AdccRegs.ADCSOC3CTL.bit.ACQPS = 25;
// Configure SOCs for ADCD
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0; // ADCC2
AdcdRegs.ADCSOC0CTL.bit.ACQPS = 25;
AdcdRegs.ADCSOC1CTL.bit.CHSEL = 1; // ADCC3
AdcdRegs.ADCSOC1CTL.bit.ACQPS = 25;
AdcdRegs.ADCSOC2CTL.bit.CHSEL = 2; // ADCC4
AdcdRegs.ADCSOC2CTL.bit.ACQPS = 25;
AdcdRegs.ADCSOC3CTL.bit.CHSEL = 3; // ADCC5
AdcdRegs.ADCSOC3CTL.bit.ACQPS = 25;
// Configure ADC interrupts for ADCA
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdcaRegs.ADCINTSEL1N2.bit.INT2SEL = 1;
AdcaRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdcaRegs.ADCINTSEL3N4.bit.INT3SEL = 2;
AdcaRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdcaRegs.ADCINTSEL3N4.bit.INT4SEL = 3;
AdcaRegs.ADCINTSEL3N4.bit.INT4E = 1;
// Configure ADC interrupts for ADCB
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdcbRegs.ADCINTSEL1N2.bit.INT2SEL = 1;
AdcbRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdcbRegs.ADCINTSEL3N4.bit.INT3SEL = 2;
AdcbRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdcbRegs.ADCINTSEL3N4.bit.INT4SEL = 3;
AdcbRegs.ADCINTSEL3N4.bit.INT4E = 1;
// Configure ADC interrupts for ADCC
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdccRegs.ADCINTSEL1N2.bit.INT2SEL = 1;
AdccRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdccRegs.ADCINTSEL3N4.bit.INT3SEL = 2;
AdccRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdccRegs.ADCINTSEL3N4.bit.INT4SEL = 3;
AdccRegs.ADCINTSEL3N4.bit.INT4E = 1;
//ADCD
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdcdRegs.ADCINTSEL1N2.bit.INT2SEL = 1;
AdcdRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdcdRegs.ADCINTSEL3N4.bit.INT3SEL = 2;
AdcdRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdcdRegs.ADCINTSEL3N4.bit.INT4SEL = 3;
AdcdRegs.ADCINTSEL3N4.bit.INT4E = 1;
// Clear all interrupt flags
AdcaRegs.ADCINTFLGCLR.all = 0x3F;
AdcbRegs.ADCINTFLGCLR.all = 0xF;
AdccRegs.ADCINTFLGCLR.all = 0xF;
AdcdRegs.ADCINTFLGCLR.all = 0xF;
// Enable PIE interrupt group 1, INT1.1 = ADCA1
PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
IER |= M_INT1;
EDIS;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
__interrupt void adcISR(void)
{
adcResults_0 = AdcaResultRegs.ADCRESULT0; //A3
adcResults_1 = AdcaResultRegs.ADCRESULT1; //A5
adcResults_2 = AdcaResultRegs.ADCRESULT2; //A14
adcResults_3 = AdcaResultRegs.ADCRESULT3; //A15
adcResults_4 = AdcbResultRegs.ADCRESULT0; //B2
adcResults_5 = AdcbResultRegs.ADCRESULT1; //B3
adcResults_6 = AdcbResultRegs.ADCRESULT2; //B4
adcResults_7 = AdcbResultRegs.ADCRESULT3; //B5
adcResults_8 = AdccResultRegs.ADCRESULT0; //C2
adcResults_9 = AdccResultRegs.ADCRESULT1; //C3
adcResults_10 = AdccResultRegs.ADCRESULT2; //C4
adcResults_11 = AdccResultRegs.ADCRESULT3; //C5
adcResults_12 = AdcdResultRegs.ADCRESULT0; //D0
adcResults_13 = AdcdResultRegs.ADCRESULT1; //D1
adcResults_14 = AdcdResultRegs.ADCRESULT2; //D2
adcResults_15 = AdcdResultRegs.ADCRESULT3; //D3
// Clear ADCINT1 flags
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
// Acknowledge interrupt
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
