• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 82 subscribers
  • Views 285 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280039: Issue of FED value exceeds TBPRD value

Leo Wu
Intellectual 2020 points

Part Number: TMS320F280039

Tool/software:

Hi experts,

I am testing the function of DB and Global load with frequency changing. The details are as follows.

All the CMPA CMPB TBPRD FED RED are using global load (OSH). The moment of global load is TB counter reaches 0.

If the FED value exceeds TBPRD value, Is the follow content depicted in the picture true?

1.Even if the TB counter has reached 0, the FED will continue to count and continue to produce the dead-band delay effect.

2.When frequency changing and global load happened, Since the FED counter has not reached 0 at this time, it will not respond to this load instruction.

3.Based on 2, This global load instruction will be cached by FED, and then the global load instruction will be executed when the FED count reaches 0.

4.Based on 3 & 4, In the first PWM cycle after frequency conversion, a pulse will be lost at the circled position in the figure

Thanks,

Leo

  • +1
    TI__Mastermind 27190 points
    Leo Wu said:
    1.Even if the TB counter has reached 0, the FED will continue to count and continue to produce the dead-band delay effect.

    Yes, this is true.

    Leo Wu said:
    2.When frequency changing and global load happened, Since the FED counter has not reached 0 at this time, it will not respond to this load instruction.

    Yes, this is true.

    Leo Wu said:
    3.Based on 2, This global load instruction will be cached by FED, and then the global load instruction will be executed when the FED count reaches 0

    Yes, this is true.

    Leo Wu said:
    4.Based on 3 & 4, In the first PWM cycle after frequency conversion, a pulse will be lost at the circled position in the figure

    Yes, this can happen if the FED value is larger than the new CMPA value.

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    TI__Intellectual 2020 points

    Hi Marlyn,

    On my client side, we found that if the FED value is so large to exceed TBPRD value, the miss pulse event will occur as the picture shows with global load.

    However, if we reduce the FED value to make sure that the FED value do not exceed the TBPRD value, the miss pulse event will not occur with global load.

    Thanks,

    Leo

  • 0 in reply to Leo Wu
    TI__Mastermind 27190 points

    Hi Leo,
    Thank you for sharing your observation. Do you have some sample code that you could share so I could more easily replicate this scenario on my side?

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    TI__Intellectual 2020 points

    Hi Marlyn,

    Sorry for delay. I have modified the client's code and re-produced the issue on the launchpad TMS320F280039.

    Here is the result of pulse missing. The setting of TBPRD and DB are as follows:

    The same as I calculated before.

     

    For comparison, I test some more change pairs.

    For this change, FED will not exceed TBPRD.

    This is OK

    For this change, FED will exceed TBPRD. The event of FED counter reaching zero is earlier than CMPA AQ action

    There will no pulse miss.

    I will share the code to TI drive. Here is the code comment.

    In this project, I test the EPWM1, you can refer to the EPWM1 setting in the syscfg.

    This program will enable EPWM1 output after a little delay when you run the code. And the client change the EPWM1 setting in ISR function INT_EPWM3_LA_ISR (line18, pfc_loop.c). The frequency for this ISR is 35k. The flow of EPWM1 setting changing is: ISR INT_EPWM3_LA_ISR(line18,  pfc_loop.c) -> cllc_loop_task(line32,  pfc_loop.c) -> charge_loop_state_transition(line68,  cllc_loop.c)->charge_loop_handle(line96,  cllc_loop.c)-> EPWM1 setting change.

    I add the some variables (defined at line74-83, main.c) to test the frequency changing. When set sample to 1,  GPIO23 (line56, cllc_loop.c) will toggle (low->high). And new value of TBPRD and DB will be wrote into the register (line296-366, cllc_loop.c).

    demo link: https://tidrive.itg.ti.com/a/ZJIFUm6SBTZ2kgUW/4980f3a5-f0dd-4ca2-a5ac-9d4d229f4276?l

    Thanks,

    Leo

  • 0 in reply to Leo Wu
    TI__Mastermind 27190 points

    Hi Leo,

    Thank you for sharing the code and additional details. I have confirmed that your observation is true. I have modified my first response to avoid confusion for others. Indeed, the new FED value (after global load) only affects the NEXT edge and not the current edge. In your example scenario, this can cause a missing pulse if not accounted for.

    Best Regards,

    Marlyn