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TMS320F280039C: I2C communication question

Part Number: TMS320F280039C

Tool/software:

Hi expert,

Ive been preparing a BL about the 280039 recently, and want to discuss two items with you:

Q1: when I read data via I2C bus, the target will hold the SCL as low and the GUI readback the wrong data(picture1), So how long will the target will hold the SCL while in the salve-transmitter mode

 

Q2: when I modify the CMD file just take the .text section from the Bank0 to Bank1, but these dont seem to work(picture2)

 

  • Hi Angela,

    Q1: when I read data via I2C bus, the target will hold the SCL as low and the GUI readback the wrong data(picture1), So how long will the target will hold the SCL while in the salve-transmitter mode

    The target transmitter will hold the clock low while the I2C transmit buffer is empty and will release SCL when I2C starts transmitting data. I've attached a diagram from the F28P55x TRM that describes this same automatic clock stretching on F28003x:

    Q2: when I modify the CMD file just take the .text section from the Bank0 to Bank1, but these dont seem to work(picture2)

    Let me loop in a flash expert for the second question.

    Best Regards,

    Aishwarya

  • Hi Angela,

    Q2: when I modify the CMD file just take the .text section from the Bank0 to Bank1, but these dont seem to work(picture2)

    From your screenshot, it seems still your code is in BANK0. Please map .TI.ramfunc  and other sections to Bank1 as well.

    Regards,

    Rajeshwary

  • Hi Aishwarya,

    As the diagram show, the clock stretching should between C and D ( in the Non-FIFO mode), which is a dynamic value by the experimental results, so I want to know the exact range.

  • Angela,

    From my understanding, this value is dynamic but let me reach out to the design experts to see what they say. Please give me at least two days to get back to you on this.

    Best Regards,

    Aishwarya

  • Angela,

    I've confirmed that this value is controlled by the internal I2C logic. I2C checks to see if data is available in register or not. If not, I2C clock stretches. Clock Stretching is disabled as soon as the TXData register gets written to, which is dependent on application code.

    Based on the experimental value, you may implement the appropriate handling, if needed.

    Best Regards,

    Aishwarya