F29H859TU-Q1: Inquiry Conditions for IO Pins Entering High-Z State

Lawrence Wang

Part Number: F29H859TU-Q1

Tool/software:

Hi experts,

I have a question regarding the behavior of IO pins.

It is known that after a reset, the IO pins enter a high-impedance (HI-Z) state. Could you please clarify under what other conditions the IO pins might also enter a high-impedance state?

Does the PWM trip zone lead to IO HI-Z?

3 months ago

0 Benjamin Collier 3 months ago

TI__Mastermind 36526 points

Hi,

This is configurable:

Best Regards,

Ben Collier

0 Ryan Ma 3 months ago in reply to Benjamin Collier

TI__Mastermind 25616 points

Hi Lawrence,

Please refer to the following thread.

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/934193/tms320f28377d-gpio-state-during-reset

Lawrence Wang said:
Does the PWM trip zone lead to IO HI-Z?

The PWM can be tripped for example within an NMI handler to force the PWM to turn off by writing via software to TZFRC register. Or you can use a hardware event to trip the outputs low before issuing any system reset that will cause the GPIOs to go to default state or high impedance.

Best,

Ryan Ma

C2000™︎ microcontrollers

C2000 microcontrollers forum

F29H859TU-Q1: Inquiry Conditions for IO Pins Entering High-Z State