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TMS320F280037C: CLB asynchronous issue

Julia Li
Expert 4755 points
Part Number: TMS320F280037C


Tool/software:

Hi Champs,

Customer have 4 PWM signals output through the CLB module (TILE1), which are CLB Output 0, 2, 12, and 13, as shown in the red box in the figure below.

Output 0 and 2 are directly output to GPIO0 and GPIO1 through EPWM1A and EPWM1B. Outputs 12 and 13 are sent to GPIO3 and GPIO42 through the XBAR (290037C). According to the TRM, 12-15 are asynchronous to the CLB clock, which suggests that this causes the signals corresponding to GPIO3 and GPIO42 to be out of sync compared to GPIO0 and GPIO1.

In actual measurements, when 12, 13, 0, and 2 are connected to the same signal, GPIO3 and GPIO42 lead GPIO0 and GPIO1 by about 5-6ns.

How should the customer configure it to resolve this synchronization issue? Thank you!

Julia

  • 0
    TI__Mastermind 28220 points

    Hi Julia,

    This timing mismatch is likely due to the fact that outputs 0 and 2 are overriding the PWM output while 12 and 13 are being sent directly to the outputs via the XBARs. When you use the CLB output XBAR to send outputs 0, 2, 4 and 5 to different GPIOs do you still see the same timing mismatch?

    Thank you,

    Luke