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TMS320F28388D: Register CRCLOCK default values

Part Number: TMS320F28388D

Tool/software:

Hi champs, 

I am asking this for our customer.

The user finds they have 0x7FFFFFFF and 0x7FFEFFFF in their F2838x.

Would you please clarify what they mean and how they are used?

Does that mean there are different default values from 0x7FFFFFFF because TI would change it?

But no matter what value TI changes, only the LSB 4-bits matter. TI will always keep the LSB 4 bits as 0b1111 so that by default CRCLOCK[3:0] is 0b1111 - meaning VCRC has the ability to calculate on secure memory.

Is it correct?

  • Hi Wayne,

    As long as the 4 least significant bits of Z1OTP_CRCLOCK[3:0] are '1's and the rest of the 28 bits Z1OTP_CRCLOCK[31:4] are NOT all '1's then VCU will be able  to calculate CRC, otherwise if register  Z1OTP_CRCLOCK[31:0] is 0xFFFFFFFF (all 1's) then VCU will not be able to calculate CRC on secured memories.

    Regards,

    Joseph