TMS320F2800157: PIE RAM parity test failed

Tool/software:

Hello,

I am working on RAM ECC parity test. I have ITRAP on PIERAMParityTest function when index is 1. 

After first iteration "RPC 0x3FFD2C Return Program Counter [Core]" goes this value which is not on the ram or flash range. After index set to 1 when returning from "STL_RAM_testRAMLogic" function, cpu generates ITRAP.  Data on PIE_RAM_TEST_ADDR is 0x000BB155 and original is 0x0009B157

I tried "sdl_ex_ram_ecc_parity_test" example, it is works fine on the same MCU.

I have added "STL_RAM_" prefix on the functions. The functions are same with "sdl_ex_ram_ecc_parity_test" example

// Using the I2CB interrupt (8.3) for testing here, but you may select others
#define STL_RAM_PIE_RAM_TEST_INT        INT_I2CB
#define STL_RAM_PIE_RAM_TEST_PIEIFR_REG (PIECTRL_BASE + PIE_O_IFR8)
#define STL_RAM_PIE_RAM_TEST_PIEIFR_BIT (PIE_IFR8_INTX3)
#define STL_RAM_PIE_RAM_TEST_ACK        INTERRUPT_ACK_GROUP8
#define STL_RAM_PIE_RAM_TEST_ADDR       0x00000DB4UL

uint16_t w_test_STA_TEST_RAM_ECC_PARITY(bool injectError)
{
  (void)injectError;
  uint16_t returnVal;
  uint16_t failCount;

  // Clear all the NMI and RAM error status flags.
  MemCfg_clearCorrErrorStatus(MEMCFG_CERR_CPUREAD);
  MemCfg_clearCorrErrorInterruptStatus(MEMCFG_UCERR_CPUREAD);
  MemCfg_clearUncorrErrorStatus(MEMCFG_UCERR_CPUREAD);
  SysCtl_clearAllNMIFlags();
  SysCtl_clearInterruptStatus(0xFFFFFFFFU);

  // Configure the correctable error interrupt threshold.
  MemCfg_setCorrErrorThreshold(1U);

  // Plug the NMI and RAM correctable error ISRs.
  Interrupt_register(INT_NMI, &STL_RAM_nmiISR);
  Interrupt_register(INT_SYS_ERR, &STL_RAM_corrErrorISR);
  Interrupt_enable(INT_SYS_ERR);

  SysCtl_setInterruptStatusMask(STL_RAM_MASK_ALL_BUT_RAM_ERR);

  // Plug a routine to handle a PIE Vector Table parity error
  EALLOW;
  HWREG(CPUSYS_BASE + SYSCTL_O_PIEVERRADDR) = (uint32_t) &STL_RAM_pieVectErrorHandler;
  EDIS;

  // Enabling the NMI global interrupt (typically already enabled by boot ROM
  // or GEL file).
  SysCtl_enableNMIGlobalInterrupt();

  // Enable RAM correctable error interrupt.
  MemCfg_enableCorrErrorInterrupt(MEMCFG_CERR_CPUREAD);

  // Enable Global Interrupt (INTM) and Real Time interrupt (DBGM).
  EINT;
  ERTM;

  // Test parity functionality by injecting an error in parity RAM.
  failCount = STL_RAM_runParityTest();

  // Test parity functionality by injecting an error in PIE RAM.
  failCount += STL_RAM_runPIERAMParityTest();

  // Test ECC functionality by injecting a few correctable errors in m0Data_ECCParity.
  failCount += STL_RAM_runCorrectableECCTest();

  // Test ECC functionality by injecting an uncorrectable error in m0Data_ECCParity.
  failCount += STL_RAM_runUncorrectableECCTest();

  // Status of a successful handling of the RAM ECC/parity errors.
  if(failCount != 0U)
  {
    //TEST FAIL: RAM ECC Parity Test!
    returnVal = STA_TESTS_FAIL;
  }
  else
  {
    //TEST PASS: RAM ECC Parity Test!
    returnVal = STA_TESTS_PASS;
  }

  return returnVal;
}