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TMS320F28035: RAML0 Overflow – Dual-Mapped Memory vs Combined RAML0+L1

Vu Phuong
Prodigy 30 points
Part Number: TMS320F28035

Tool/software:

Dear TI Support Team,

I am currently developing a project using the TMS320F28035 and have encountered a memory-related issue that I hope to get your insight on.

I have written a program that utilizes the memory of the TMS320F28035. I’m currently facing a memory overflow issue in the RAML0 section of the code. Although I have optimized the program as much as possible, the problem still persists.

After reading the C2000-2803x technical documentation, I found that it’s possible to combine RAML0 and RAML1 to increase the available memory space for the program. RAML1 is currently unused. However, I also noticed that RAML0 is dual-mapped, and it seems to provide faster execution speed compared to other memory blocks, which is critical because my application requires high execution speed.

Therefore, I have a few questions that I’d like clarified:

  1. If I combine RAML0 and RAML1, will my program actually run slower compared to executing solely in RAML0 SARAM, due to the loss of dual-mapped characteristics?

  2. Are there any alternative solutions to deal with the memory overflow problem?

I would greatly appreciate your advice or any possible solutions regarding this issue.
Thank you very much for your support.


  • 0
    Prodigy 30 points

    Part Number: TMS320F28035

    Tool/software:

    Dear TI Support Team,

    I am currently developing a project using the TMS320F28035 and have encountered a memory-related issue that I hope to get your insight on.

    I have written a program that utilizes the memory of the TMS320F28035. I’m currently facing a memory overflow issue in the RAML0 section of the code. Although I have optimized the program as much as possible, the problem still persists.

    After reading the C2000-2803x technical documentation, I found that it’s possible to combine RAML0 and RAML1 to increase the available memory space for the program. RAML1 is currently unused. However, I also noticed that RAML0 is dual-mapped, and it seems to provide faster execution speed compared to other memory blocks, which is critical because my application requires high execution speed.

    Therefore, I have a few questions that I’d like clarified:

    1. If I combine RAML0 and RAML1, will my program actually run slower compared to executing solely in RAML0 SARAM, due to the loss of dual-mapped characteristics?

    2. Are there any alternative solutions to deal with the memory overflow problem?

    I would greatly appreciate your advice or any possible solutions regarding this issue.
    Thank you very much for your support.

  • 0 in reply to Vu Phuong
    TI__Guru* 80190 points

    Vu,

    Apologies for the lateness of my response. Responses below:

    Vu Phuong said:
    If I combine RAML0 and RAML1, will my program actually run slower compared to executing solely in RAML0 SARAM, due to the loss of dual-mapped characteristics?

    The dual mapping here, refers to the RAM being available in both program and data space. For this device there is additional co-processor, the CLA, that can have access to the memories shown for its program and data.  By default all memories are mapped to the C28x CPU.

    If you are not using the CLA, then you can combine the L0/L1 RAMs into one entity in your linker, and there will not be any penalty in performance.  What is not clear in that image, all RAMs are dual mapped; when we added the CLA(this device was the 1st device to have CLA from C2000 team), and added those accesses, we neglected to keep the "dual-mapped' notation 

    I would add that you are not obligated to allocate the entire L1 RAM with the L0, you can choose some portion of it as needed by size.  In case you need extra RAM for data variables, etc.

    Vu Phuong said:
    Are there any alternative solutions to deal with the memory overflow problem?

    In the compile options, you can look to see what optimization level is in place for your project.  In all of our development projects we use optimization level 2 as the default.  This will reduce the linear code size and perhaps it will be enough for the code to fit.

    If you right click on your project and click "options" at the bottom it will bring up the below dialogue box, then pick optimization.

    You can try different optimization levels, but again I would recommend starting with level 2(Global optimization)

    There is also a slider to try and optimize for code speed vs size, you can try different settings here as well, but I would try the optimization first before changing this.

    Finally, you see the "configuration" at the top; most of our example projects have two configurations, debug and release.  In the project menu, you can add more configs, and have different optimizations and predefines for each one.  This would allow you to easily change compilation options and linker options based on the configs, if you want to experiment a bit.

    One last caution, is that in our examples we often put compile time if statements based on predefines.  The debug config, will typically have a _DEBUG predefine that will activate these conditionals that have several checks for code goodness.  Once you are done developing, you should switch to "Release" configuration, as these debug lines of code are un-necessary for a final release.  I don't think that F2803x code uses this as much as the newer devices, but just wanted to point this out in case you are not seeing the performance you expect from your code.

    Best,

    Matthew