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TMS320F28P650DK: When using the library and program for Endat2.2 communication implemented with the officially provided CLB, the encoder does not respond after sending a command.

Part Number: TMS320F28P650DK

Tool/software:

Dear  engineer,

I sent two commands, ENCODER_RECEIVE_RESET and ENCODER_SEND_POSITION_VALUES, respectively. Using an oscilloscope, I confirmed that both data and CLK were transmitted, and the data was normal. However, the CLK does not seem to comply with the official regulations of Endat2.2. Why are there two periods of low - level with relatively long durations?
I think it's caused by the incorrect generation of the initial CLK.

The blue one is CLK+, the yellow one is DATA+, and the red one is CLK-.
Now the cables I am using are long, resulting in high impedance, which may cause large glitches in the oscilloscope images. 
I have checked the internal logic and configuration of the CLB, as well as the .svg files, and they are all identical to those in the official lib project.

Best Regards,

Lin Haonan

  • I would start by checking the power to the encoder since you see a request going out, but no response coming back. Also check the clock rate to make sure it meets the requirements.. 

  • Hi Lori,

    I found that the time I provided was insufficient. The response time of ENCODER_RECEIVE_RESET requires about 16ms. However, when receiving and unpacking the encoder return data now, it is found that after running the unpacking program, the data bits of endat22.data and endat22.address are incorrect: In the sent command, the address is 0x00AA and the data is 0x2222. But after the receiving program runs, the address becomes 0x0055 and the data becomes 0x1111—both shifted right by one bit, and the CRC check also fails.This should be an error in the shifting process of the program.

    Here are the diagrams for data transmission and reception. It can be seen that the timing sequences for transmission and reception, as well as the number of CLK cycles, are correct. However, it is unclear why there is an extra count in the SPIFIFO, and the data is not zero.

    Best Regards,

    Lin Haonan

  • Hi Lin,

    If I understand, the correct data is being received but shifted from what the example is expecting. I won't be able to look into this deep at this time, but I will file a bug report for any future work on this example.

    Regards,

    Lori

  • Hi Lori,

    Regarding the Endat communication protocol, I would like to inquire further: What are the calculation rules for the 5-bit CRC? This includes the polynomial, initial value, result XOR value, whether the input data needs to be inverted, and whether the output data needs to be inverted.

    Could you please help answer this question or forward it to the technical personnel who can clarify it? Sincere thanks!

    Regards,

    Lin Haonan

  • Hi Lin - give me a day to track this down. 

  • Hi Lin - can you send me a friend request so I can message you directly?

    Regards,

    Lori