Part Number: TMS320F280049
Other Parts Discussed in Thread: C2000WARE, SYSCONFIG
Tool/software:
Hello all,
I have configured 4 HRPWM module for high-res frequency and phase shift control.
I have selected the EPWM1 as the master and rest are the slaves.
In general I managed to obtained desired frequency and phase shift however I have a question for sync mechanism.
I am calculating the period and phase shift values in every 80 us control period.
Then I want to update the phase shift value for each slave PWM when the PWM1 time base counter = 0.
So far there is no problem I can do this. But I would like to disable the sync mechanism after the sync pulse is fired so that jittering problem due to using HRPWM would have less affect.
Here the problem starts. Here are my tries:
1- PWM Interrupt method
- I have configured the PWM1 Interrupt which is triggered when the PWM1 Time Base CTR = 0.
- At the end of my PWM_update function I call this line for activating sync mechanism EPWM_setSyncOutPulseMode(myEPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
- Then I enable the PWM1 INT by HRPWM_enableInterrupt(myEPWM1_BASE);
- In the PWM ISR, I disable the sync mechanism and also PWM interrupt to be enabled again at the next PWM_update function
- HRPWM_setSyncOutPulseMode(myEPWM1_BASE, EPWM_SYNC_OUT_PULSE_DISABLED);
- EPwm1Regs.ETSEL.bit.INTEN=0; //disable ePWM1interrupt
- This method works fine generally but randomly creates problem such that:
- Sometimes the sync pulse is not fired although I could see that SW entered the PWM1 INT (according to logic PWM int should be entered after the sync pulse fired, at least I hoped )
- Sometimes EPWM1 interrupts affects ADC INT. ADC INT is triggered by a dummy PWM which is not HR mode and totally independent from the 4 HRPWM modules
- I guess the these problem arise due to interrupt handling and lack of nesting logic but I am not sure may be they are about using the same event ( PWM1 TBCTR = 0 ) for the sync pulse firing and PWM interrupt triggering
2- My second theriacal method is using the sync pulse as a trigger for PWM interrupt ( I guess as TZ event interrupt with the digital compare submodule) . With this method I would be sure that PWM interrupt ISR will be entered sync pulse. Then I would safely disable the sync pulse mechanism.
- So far I could not manage to enabled the PWM ISR with this method
3- My third method is using the already configured ADC interrupt
- In this method after the EPWM_setSyncOutPulseMode(myEPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO); line in the PWM_update function, I make a flag variable 1.
- Then ın the ADC interrupt (ADC INT fperiod is 5us) I increment a counter up to a threshold which corresponds 10us. This threshold time is sufficient for the all frequency range that my PWM can have.
- I mean at min frequency I am guaranteed that at least one sync pulse is fired before I disable the sync mechanism.
- However, as you can understand easily when my switching frequency for HRPWM increases more than one sync pulses are fired before I disable the sync mechanism.
- This increases the jittering problem affect upon the PWMs. I can see on the scope screen PWM signals are not exactly stable.
To sum up I am looking a way to fire sync pulse for the slave HRPWM when the Master HRPWM TBCTR = 0 since this makes all the transition smoother.
I can try any other advice.
Best regards,
Gökhan

