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TMS320F28379D: Enabling phase shift control, with phase shift of 0, creates asymmetry in PWM signal

Part Number: TMS320F28379D
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE

Tool/software:

Hi,

I'm using SysConfig to configure ePWM signals. Configuration for PWMs looks like this:

              

The deadband control is based on active high complimentary presets:

When the enable phase shift load is enabled, even thought the phase shift value is 0, the waveform (PWM1A, PWM1B) will become asymmetric.

    

The code generated by Sysconfig is 

EPWM_enablePhaseShiftLoad(PWM1_BASE);    
    EPWM_setPhaseShift(PWM1_BASE, 0);    

vs 

EPWM_disablePhaseShiftLoad(PWM1_BASE);    
    EPWM_setPhaseShift(PWM1_BASE, 0);

Is this normal/expected? If yes what's the equation for calculating duty cycle of each signal (PWMxA and PWMxB)?

If no, what could be the source of the problem?

Thanks

  • Hello,

    It takes two TBCLK cycles for SYNCOUT pulse to SYNCIN pulse synchronization, so the phase shift load should be at least set to 2.

  • Thanks for the response. This doesn't solve the issue. With the phase shift value of 2 (or 0) the duty cycle ration between PWMxA/PWMxB is 60/40%. The TBPRD is 278 (CMPA 139) so the difference is much greater than 2 clock cycles.

    I've been able to work around the duty cycle issue by not enabling the phase shift on pwm1. It seems like as long as pwm1 phase shift is disabled, the rest will work just fine. This could be a solution instead of a workaround, but I'm not sure. 

  • Hello Ehsan,

    If EPMW1 is your master ePWM then you should not enable phase shift load on it. You should enable force a sync pulse, and on the other ones you should put sync in source EPMW1 syncout signal. Please refer to epwm c2000ware example to check your configuration.