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TMS320F28P650DK: CLB Sysconfig Output LUT runtime modification

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

This is with reference to a design using the CLB SysConfig tool for one of our state machines to generate custom pulse pattern.

In one of the TILE design, the Output Look-Up Table 5 is bound a logic equation taking Input 0 and Input 1. I would like to modify this equation at run time based on application logic, i.e select Input 0 or (Input 0 AND Input 1) based on application logic. Pls let me know if there is a way to modify. I have tried other approaches like assigning outputs of FSM, but it gives erroneous result.

Although, it looks like a simple condition, I am not able to access the individual inputs of Output LUT through APIs. Any advice/ help on this would be greatly appreciated.

  • Hello,

    Our CLB expert is out of office until next Monday, please expect a response 1-2 days after they return.

    Best,

    Matt

  • Hi Prashant,

    If you want software-controlled CLB behavior during runtime I would recommend setting up your CLB to behave differently depending on the value of the GPREG CLB inputs. For example you could have CLB input 3 be controlled by GPREG and then modify GPREG bit 3 in your runtime code. Your CLB configuration would then incorporate the value of input 3 into its logic.

    Thank you,

    Luke