Other Parts Discussed in Thread: ADS8686S
Tool/software:
Hi colleagues,
I am asking you my problem for a development that I am doing. We have an ADC model ADS8686S (16 channels, 1MSPS, EMIF1 parallel bus) in which I ask it to convert 16 signals and with those 16 signals I develop the control loop. You can see the connection below:
Well, I am going to extend this development to put 2 ADS8686S and my idea is to take out only one more CS pin and double the rest of the signals of D0-15, WEn, OEn, BUSY, CONV and that the two ADCs share it. The ADC does not need the A0-15 address bus because to write to its register the address is set in the D0-15 data bus itself. I am going to add another BUSY signal so that each ADC tells me when it has done its conversions
That said, I see the following problem. My idea is to carry out the following sequence:
1. I send CONV to both ADCs at the same time.
2. I receive from each ADC its BUSY signal at 0 to start reading the conversions.
3. I read the conversions from ADC1
4. I read the conversions of ADC2
5. I realise the control loop
I see the problem between step 3 and step 4. The communication of ADC1 I do it with CS4 but with ADC2 I am going to do it with CS2. I have not yet started to develop it until I discuss it with you. I have configured the following in the EMIF configuration for CS4:
Basically to communicate with the ADC1 what I do is to indicate the address of the CS4 and with that the CS4 pin is activated. My idea is to configure the EMIF1 to work with the CS2 and perform the same task with the ADC2.
So I want to know if, by configuring both CSs correctly and addressing them correctly, there might be some kind of problem as the EMIF is going to be switching between CS4 and CS2 continuously.
I will wait for your answer, have a nice day, thank you in advance
