TMS320F28379D: Watchdog Management

Hi,

For CPU2 also you can trigger CPU2 watchdog reset that should reset CPU2 core.

But CPU1 WD reset resets the whole device including CPU2 core

vincent liebart said:

Are these resets compliants with the emulation mode ?

Any CPU reset runs through BootROM where the same logic applies for boot mode selection 

vincent liebart said:

CPU2 seems to be suspended with a BreakPoint

Was CPU2 suspended/halted before the CPU1 WD reset trigger ? if you hit run on CPU2 what happens does it reset ? 

Thanks

Hello. I am glad that someone helps me on this issue.

First thank you for the extract you sent me, concerning the CPU2 reset.

Prarthan Bhatt said:

Was CPU2 suspended/halted before the CPU1 WD reset trigger ?

No, the CPU2 was not halted before the reset happened.

Prarthan Bhatt said:

if you hit run on CPU2 what happens does it reset ?

Before the reset, the CPU2 is managing a CAN Stack. Everything is working as expected.

After the reset, the CPU1 is running although I did not press the run button. If I press the pause button, I can see that it is wating for a IPC acknowledgment, maybe the acknowlegment needed for the IPC_sync function.

If I let the CPU1 running et press Run on CPU2, I just can see that the CAN stack does not work. By pressing the pause button, I can see that CPU2 is waiting at the same point than before:

I hope that you could help me !

Vincent

Hi,

vincent liebart said:

After the reset, the CPU1 is running although I did not press the run button. If I press the pause button, I can see that it is wating for a IPC acknowledgment, maybe the acknowlegment needed for the IPC_sync function.

This is correct. CPU1 goes through reset and waits for IPC sync from CPU2.

vincent liebart said:

f I let the CPU1 running et press Run on CPU2, I just can see that the CAN stack does not work. By pressing the pause button, I can see that CPU2 is waiting at the same point than before:

I dont quite understand the above, "Press run on CPU2 " - So CPU2 is not running when CPU1 WD reset is asserted ?

"CPU2 is running same point as before" - Is CPU2 running the application code like before CPU1  reset is asserted.

Can you try with multicore example in C2000Ware and see if you are able to boot CPU1/CPU2 after reset. I would expect that when CPU1 WD reset is asserted the CPU1 and CPU2 go through reset and boot up again.

Thanks.

Hello,

First, sorry if I was not clear enough.

Down here the behaviour of my programm.

1) I launch a debug session.

The two CPU are waiting at theur main() point.

2) I Run the CPU1 programm

At the begining of its main function, there are the board_init() function, in which the watchdog is not started, and the synchronization with the CPU2

3) I run the CPU2

At the begining of its main function, there are the board_init() function, and the synchronization with the CPU1

3) The programm is running. 

Just before the while(1) I enable the watchdog. 

This does not cause the reset of the CPU1 but an interrupt. I ask for the reset in the ISR:

4) Thanks to a conditionnal while loop, I make the watchdog overflow:

It seems that the CPU1 is automatically started. That surpises me because I expected CPU1 would be halted at main() point

5) The CPU2 is supspended.

As I told "Press Run on CPU2" I mean that I clicked on Resume button:

Then, the CPU seems to run but my application does not work at all

By pressing the Suspend button, the programm is at the same point than before

Hi,

vincent liebart said:

That surpises me because I expected CPU1 would be halted at main() point

When CPU resets it goes through Bootrom if its configured to boot to flash it starts executing the flash and doesnt stop at main unless you have breakpoint at main. Breakpoint at main tells debugger to stop otherwise it continues execution

vincent liebart said:

The CPU2 is supspended.

As I told "Press Run on CPU2" I mean that I clicked on Resume button:

Is CPU2 configured to Boot from flash ?

Could you check c2000ware multicore examples to see how CPU2 boot mode are configured.

vincent liebart said:

hen, the CPU seems to run but my application does not work at all

Could you check where CPU2 is at ? I see Sysctl_delay function but can you find where that function is called from in your code and why did it reach there ?

Could you put breakpoint at CPU2 main and see if reaches the main() after reset.

Thanks

Hello Prarthan,

Sorry for the delay. I took time to create an example, based on the TI project. These example has ti be run on the Launchpad. Could you take a look at it ? 

If you want to test the project, you just have to set the variable uint16_Freeze while running:

I checked if CPU reaches the main function by placing a breakpoint: NO, it does not reach the main function

2025_07_04_TISupport.zip

Hey,

I was able to try the code you sent earlier, I can see the behavior you showed above but that is when the EMU BOOT MODE is not set.

When connected to debugger you need to set the Emulation boot mode to flash for the device from CCS as shown below

After you do the above you would see that CPU2 boots to flash like below

Thanks

Hello Prarthan,

First, thank you for taking time to run the project I sent you.

Your answer resolved my problem. But before I close this thread, I would like to ask you ... It's been 2 years I use the C2000 device. I never touched at this script menu. Why did I never have any problem therefore ?

Can you tell me more about this choice for EMU boot ? Do you have any document about this ?

Thanks a lot.

Vince

Hello, just to be sure,

 Is this script make the value of EMU_BMODE = 0x0A or 0x0B ? So the micro controller knows where to jump ?

I talk too fast when saying that you resolved my problem. It seems to be OK for the FLSH configuration, but not for the RAM one:

- I open a debug session

- I select the right EMU mode for each project:

- I launch the two projects

- I force the freezing of the programm

=> it seems that a reset is asked to the CPU2, but the CPU1 is halted:

Can you explain me why ?

Thanks