Part Number: TMS320F28386D-Q1
Tool/software:
Hi TI experts,
As mentioned in the title, when our product is applied in the customer's vehicle, the CM core of the DSP encounters a CMNMIWDRSTn issue. This is a discrete probability event. When the problem occurs, the CM core of the DSP stops working.
The DSP CM core is mainly used for CANfd communication of lidar and temperature monitoring of lidar based on I2C.
We adopted the method of attach debugger to download the register/FLASH/RAM data of each DSP core from the problematic products，and then conducted a comparative analysis between the data of the problematic products and normal products. Some issues were found as follows:
1. The CM core was reset, and CMTOCPU1IPCBOOTSTS register is 0x8, it showed "Waiting for CPU1 to set CPU1TOCMIPCFLG0 to allow CM to start booting".
2.The CMNMIWDRST bit of CM_STATUS_INT_FLG register was set.
3.The CMNMIWDRSTn bit of CMRESC register was set.
4.The FLUNCERR bit of CMNMISHDWFLG register was set.
To sum up, the issue is caused by a Flash uncorrectable error, which is a probabilistic event. It is difficult for us to capture it. We would like to consult TI's technical experts about the possible causes of this problem and what we should do next.
<attach1> <attach2> removed.
The attached files contain the downloaded register/FLASH/RAM data of the problematic product and the normal product for reference.
