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28335 ADC Readings Inconsistent

I am testing noise results on the 28335 and to get a feel for the noise I am doing a past-to-present sample conversion delta.  I am just measuring a fixed DC level signal so the conversion delta should be related just to the noise and conversion accuracy. For some reason I do not get a consistent conversion value I read from the ADC.  Sometimes it is fairly small delta which is what I expect (±5 codes or so).  But sometimes I get a delta of ±15 codes or so.  What I am doing is resetting the device and letting it run through the exact same firmware each time.  I can’t figure out why this is happening.  Any thoughts?

  • Here is the code:

     

                    // Power up bandgap/reference/ADC circuits

                    AdcRegs.ADCTRL3.all = 0x00E0;

     

                    // Delay to stablize before converting any ADC channels

                    DELAY_US(ADC_POWERUP_usDELAY);

     

                    // ADC module clock = HSPCLK/(2*3) = 150MHz/(6) = 25 MHz (40ns)

                    AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;

     

                    // Sample and hold time = ADC_CKPS/(1+ACQ_PS) = 25MHz/(1+4) = 200ns

                    AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;

     

                    // Set for two 8 state sequencers (default value)

                    AdcRegs.ADCTRL1.bit.SEQ_CASC = 0;

     

                    // Set AD Clock prescaler to 1 (default value)

                    AdcRegs.ADCTRL1.bit.CPS = 0;

     

     

     

     

                    // Stop and reset A/D sequencer 1

                    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;

     

                    // Number of conversion in sequencer 1 = 8. Sequencer 1 will immediately restart the sequence.

                   AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x07;

     

                    // Load the sampling sequence for invert1_Ia (0), invert1_Ib (1), invert2_Ia (8) and invert2_Ib (9)

                    AdcRegs.ADCCHSELSEQ1.all = 0x9810;

                    AdcRegs.ADCCHSELSEQ2.all = 0x9810;

     

                    // ADC Sequencer 1 interrupt enabled.  This is used to trigger the DMA transfer.

                    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;

     

                    // Set sequencer to run continuously

                    AdcRegs.ADCTRL1.bit.CONT_RUN = 1;

     

                    // Start A/D sequencer 1

                    AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 1;

     

     

                    // Average 2 latest phase current samples for inverter 1 phase A & B

    //              invert1_Ia = (A2D_Currents_DMABuffer[0] + A2D_Currents_DMABuffer[4]) >> 1;

                    invert1_Ib = (A2D_Currents_DMABuffer[1] + A2D_Currents_DMABuffer[5]) >> 1;

     

                    invert1_Ia = (AdcMirror.ADCRESULT0 + AdcMirror.ADCRESULT4) >> 1;

     

    // TEMP TEST

    delta_invert1_Ia = 128 + ((invert1_Ia - past_invert1_Ia) * 9);

    past_invert1_Ia = invert1_Ia;

     

     

                    // First order filter of A/D current reading:

                    // filtered_signal = (3 * filtered_signal + signal) / 4

                    filtered_invert1_Ia = ((filtered_invert1_Ia << 2) - filtered_invert1_Ia + invert1_Ia) >> 2;

                    filtered_invert1_Ib = ((filtered_invert1_Ib << 2) - filtered_invert1_Ib + invert1_Ib) >> 2;

     

     

    #ifdef DAC_TEST_CODE                                                                               // TEMP TEST CODE FOR DAC

                    dac_filtered_invert1_Ia = filtered_invert1_Ia - 1920;

                    dac_filtered_invert1_Ib = filtered_invert1_Ib - 1920;

    #endif                                                      // END TEMP TEST CODE FOR DAC

     

     

                    // Adjust for ADC's 0 to 4095 range -> make range -2048 to 2047

                    invert1_Ia = filtered_invert1_Ia - CENTER_REF;

                    invert1_Ib = filtered_invert1_Ib - CENTER_REF;

     

     

                    // Calculate the current errors

                    Iregulator_IerrA = Vregulator_Icmd_phaseA + (float)invert1_Ia;

                    Iregulator_IerrB = Vregulator_Icmd_phaseB + (float)invert1_Ib;