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TMS320F28P650DH: LIN SCI missed the first start when interference presents

Hang Yang
Intellectual 2801 points
Part Number: TMS320F28P650DH

Tool/software:

Hi Experts,

My customer is using LIN as SCI. They find that sometimes the module would miss the first start bit and take the second falling edge as start bit. This would cause an offset in frame read and hence miss the stop bit and issue a frame error.

As the below pictures shows,

The blue is the RX signal. The frame should be read as 0xAB (the lower white box), however, it take the second falling edge as start bit and ends up reading the frame as the upper white box, and issue a frame error.

The yellow is an GPIO indicating frame error, and frame error is the only error issued when this happens.

This only happen sometimes when the power stage is running and there is interference on the RX. As the picture shows, there is a spike before the start bit. They captured multiple error cases and find nearly most causes there is a spike present about 1-bit-time earlier than the fist start bit.

Is there any mechanism that would cause this issue?

This issue is happening of multiple projects that uses F28P65.

Regards,

Hang

  • 0
    TI__Genius 15915 points

    Hang,

    The expert is currently out of office and will get back to you when they return. Thank you for your patience.

    Best Regards,

    Aishwarya

  • 0 in reply to Aishwarya Rajesh
    TI__Mastermind 19305 points

    Hi Hang,

    See the below documentation about how the LIN (configured as SCI - meaning asynchronous mode is enabled) logically interprets the input on LINRX.

    It sounds like the LIN module is mistaking this spike to be the beginning of the start bit, which causes it to start sampling too early and throws off the samples used for the majority vote. If the falling edge of the actual start bit occurs when it is measuring samples from the previous "falling edge" from the spike, the module would effectively miss the real start bit.

    My suggestion would be to get rid of the spike altogether if possible - can they modify their circuit to avoid this noise? This article provides more information about this: Qualification on a Noisy Input Signal

    If the noise during the power stage on is unavoidable, they can also enable framing error interrupts and reset the LIN inside the ISR. This would only work if data isn't being sent back-to-back to the LINRX pin and if they are ok with losing the first frame of data. For this reason, I would suggest removing the noise instead if possible. 

    Best Regards,

    Delaney