This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28P659DK-Q1: TMS320F28P659DK-Q1

Part Number: TMS320F28P659DK-Q1

Tool/software:

We use the internal Power supply to power the VDD. Pin 119 on the QFP Package to ground.

My colleagues during a review, do by the US - TI support , receive the info that if they want to use the internal Reference for the ADC they have to deactivate the VDD core internal supply. 

Pin's 37, 53, 35, connected together..

Why?

I see no info's about that in the DS?

Can you support me here?

Best Regards,

Omar Vit

µC-Support @ Vitesco - Schäffler AG Nuremberg.

Is Urgent!

  • Hi Omar,

    To use the Internal Regulator you need to Make the pin 119 High (Connect to VDDIO), to generate VDD (1.2V) internally.

      

    There are couple of section for ADC VREF where is is mentioned to use internal reference 

    The reason is that internal buffer is only connected to ADC A only for B & C it needs to be routed externally.

    Let me get back to you on the part where we need to disable Internal VREG (VDD LDO) for using ADC internal reference. 

    BR,

    Nilesh

  • >>To use the Internal Regulator you need to Make the pin 119 High (Connect to VDDIO), to generate VDD (1.2V) internally

    NO! Please read carefully. It's written:

    Tie low to VSS (GND) to enable the internal VREG (Linear Regulator on and so furnish the Vcore)

    Concerning the Vref connections for me is clear, it's give a bit for activate them ..... also external connection is clear for me.

  • Hi Omar,

    Yes you are right .. Miss typed it. I am checking with the team on any background on the ADC reference query will get back to you.

    BR,

    Nilesh

  • Hi Omar,

    I have checked with the team on this regarding the Internal VREG regulator & ADC VREF.

    As per the discussions Team had with your team the reasons for not using internal Voltages are stated below. 

    1. In order to meet safety requirements, VDD (1V2) and all the other rails should be monitored externally to ensure the proper operating ranges.  In all our C2000 DS, we are not claiming Safety compliance with internal VREG due to the wide operating range so we recommend the use of external VREG for Safety applications. 
    2. For internal VREF mode,  Safety requirement is also not met since this will be a source for a single point common failure where if VREF value is incorrect, all the ADC readings will yield incorrect results. 
    3. There were two recommendations from our side:
      1. Externally measure/monitor the output of internal VREF by a supervisory circuit or
      2. Use external VREF on one of the ADCs and while the other ADCs will be on internal VREF mode.  This way, the ADCs will be monitoring values independently using different voltage reference sources.

    BR,

    Nilesh