This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28386D: FSI data Transmit data and recive data stop when I run motor.(2)

Part Number: TMS320F28386D
Other Parts Discussed in Thread: TIDM-02006

Tool/software:

Hello, TI


I am still testing FSI communication.

When I make pwm switching for motor controller. My FSI communication stop.

When I check RJ45(RX_CLK_LVDS_P, RX_CLK_LVDS_N) voltage level.

The level is about 1V attached picture.

Is the voltage level too low, causing the FSI communication to drop when running the motor? Or is the previous voltage level normal?

The FSI CLK voltage to the CPU was measured at 3.3V.

Please some advice.. 

thank you for reading

Add text (2025.06.25)

Hello, I capture the FSIRxARegs when I run motor and FSI data stop.

what means RX_ECC_LOG is '3' value?

and RX_OPER_CTRL is stoping number is 0x0078, What means this?

thank you for reading

  • to confirm, the FSI line voltage drops from 3.3V to 1V when the PWMs are running?

  • Hi Luke

    When I check the FSI voltage from 28386D, FSI line is 3.3V

    I modified the delay related to FSI transmission, and now the communication works, but I don’t know why...
    Do you know anything about this condition?
    The variable name is fsiTxTimeWaitCntr in TIDM-02006 example.
    #define FSI_TX_TIME_WAIT_CNTR       10 -> 100
    if(((fsiTxInt1Received == FSI_TRx_DONE) || (fsiTxTimeOutCntr == 0)) &&
    ((fsiHandShakeState == FSI_HANDSHAKE_DONE) && (fsiTxTimeWaitCntr == 0)))
    {
        fsiTxInt1Received = FSI_TRx_IDLE;
        fsiTxTimeOutCntr = FSI_TX_TIME_OUT_CNTR;
        fsiTxTimeWaitCntr = fsiTxTimeWaitSet;

        FSI_updateTransmissionData();

        DINT; // Disable Global interrupt INTM

    // Set FSI TX circular buffer pointer back to beginning
        FSI_setTxBufferPtr(FSITXA_BASE, 0U);

    // write User Data and Frame Tag
        FSI_writeTxTagUserData(FSITXA_BASE, fsiTsfUserDataTagNode);

    // write TX data buffer
        FSI_writeTxDataBuffer(FSITXA_BASE, fsiTxDataBufAddr, fsiTxDataWords);

        EINT; // Enable Global interrupt INTM

        FSI_startTxTransmit(FSITXA_BASE);
    }
  • When you don't have the code modification, does the code always break or is there just intermittent failures?

  • Hi Luke

    The code doesn't stop. When I pwm on/off about 50~100 times, the received data maintains a fixed value, so when I check the waveform with a scope, there’s no change. Because of this, I’m trying to figure out if it’s due to noise or find a way to reset an overrun. The ECC error and RX_INT2 values are always the same. There’s no change.

  • Okay I'm still not clear on what you're seeing under which conditions. Could you describe what is happening in each case:

    1. Original FSI code with no PWMs running:
    2. Original FSI code with PWMs running:
    3. FSI code with modified delay, no PWMs:
    4. FSI code with modified delay, PWMs running:
  • I have other questions..

    I checked my FSI_TX_OVERRUN and FSI_TX_UNDERRUN.

    FSI_TX_UNDERRUN is always counting.

    Is there a way to resolve the issue when UNDERRUN_CNT occurs?

    It seems like the cause of the communication disconnection during motor operation. What do you think?

  • Hey Hahmin,

    The underrun condition should only occur when the transmitter attempts to send data out when there is no data in the buffer. You should never initiate a transfer if there is no data in the buffer.

    You may need to reset your TX buffer pointer after each transmit to ensure that your TX buffer pointer is pointing to a memory location that you've written to with the CPU.

    Thank you

    Luke

  • Hi Luke

    My TX buffer pointer was initialized in Tx function, like this : FSI_setTxBufferPtr(FSITXA_BASE, 0U); 
    I moved the FSI_setTxBufferPtr to FSI_TX_interrupt vector function.
    I checked my underrun and overrun error cnt. 
    There are 0 count. But my FSI died about 10 times motor run on/off.
    FSI communication seems very difficult and tricky.
     RX event:
    #define FSI_RX_EVT_PING_WD_TIMEOUT (0x0001U) //!< Ping Watchdog times out
    #define FSI_RX_EVT_FRAME_WD_TIMEOUT (0x0002U) //!< Frame Watchdog times out
    #define FSI_RX_EVT_CRC_ERR (0x0004U) //!< Hardware computed CRC error
    #define FSI_RX_EVT_TYPE_ERR (0x0008U) //!< Invalid Frame type detected
    #define FSI_RX_EVT_EOF_ERR (0x0010U) //!< Invalid EndofFrame bit-pattern
    #define FSI_RX_EVT_OVERRUN (0x0020U) //!< Buffer Overrun in Rx buffer
    #define FSI_RX_EVT_FRAME_DONE (0x0040U) //!< Received frame without errors
    #define FSI_RX_EVT_UNDERRUN (0x0080U) //!< Software reads empty Rx buffer
    #define FSI_RX_EVT_ERR_FRAME (0x0100U) //!< Received error frame
    #define FSI_RX_EVT_PING_FRAME (0x0200U) //!< Received ping frame
    #define FSI_RX_EVT_FRAME_OVERRUN (0x0400U) //!< FRAME_DONE not cleared on receiving new frame
    #define FSI_RX_EVT_DATA_FRAME (0x0800U) //!< Received data frame
    #define FSI_RX_EVT_PING_FRAME_TAG_MATCH (0x1000U) //!< Recieved ping frame with matched tag
    #define FSI_RX_EVT_DATA_FRAME_TAG_MATCH (0x2000U) //!< Recieved data frame with matched tag
    #define FSI_RX_EVT_ERR_FRAME_TAG_MATCH (0x4000U) //!< Recieved error frame with tag match
    I checked the CRC and TYPE and EOF. 
    I'll check RX_OVERRUN and RX_UNDERRUN.
    Thank you Luke.
  • Glad that solved the underrun condition, let me know if you need further assistance.

  • HI Luke

    what is differnt "FSI_RX_EVT_DATA_FRAME" and "FSI_RX_EVT_FRAME_DONE" ? When I set FSI_RX_EVT_FRAME_DONE event, the event is not occur. Then the received frame with error?

  • Hi Luke,

    I get new status error when I run motor.

    RX_EOF error was founded.

    What means EOF error?

  • The end of frame is the "0110" before the postamble, the EOF error indicates a bit during the end of frame was not correct.

  • Hi Luke

    I capt scope picture about FSI_CLK and FSI_D0 I can not match the End of Frame and Posamble,,

    The waveform is incorrect, isn't it?
  • If you were able to shift your clock to end later, I think this would be correct. You should end by clocking in 4 1s but it appears you are only clocking in two.

  • If the fsi_clock is shift about 2 pulse, the packet will be ok. then I have to use this function : 

    FSI_configRxDelayLine_fix(FSIRXA_BASE, FSI_RX_DELAY_D0, Sg_FSIMA.DelayTapRX0);
    FSI_configRxDelayLine_fix(FSIRXA_BASE, FSI_RX_DELAY_D1, Sg_FSIMA.DelayTapRX1);
    FSI_configRxDelayLine_fix(FSIRXA_BASE, FSI_RX_DELAY_CLK, Sg_FSIMA.DelayTapCLK);

  • Yes that is correct, let me know if you're able to see the correction on your scope after utilizing these functions