TMS320F28P550SJ: OTA issue

Ethan Tian

Part Number: TMS320F28P550SJ

Tool/software:

Hi experts

The following are the issues we have encountered regarding the 28P55:
1. DSP Lockup Issue Caused by OTA Upgrade:
After performing an OTA upgrade, the DSP locks up, preventing program execution and re-flashing. The only change between the pre-upgrade and post-upgrade code is a specific line in the main.c file, as shown below (left: before modification; right: after modification):

2. Failure of the Fapi_setupBankSectorEnable() Function During OTA Upgrade:
During the OTA upgrade process, the execution of the Fapi_setupBankSectorEnable() function fails, causing the upgrade to stall and unable to proceed.

3 months ago

0 Ethan Tian 3 months ago

TI__Intellectual 1872 points

Please see the .cmd file

Fullscreen 28p55x_generic_flash_lnk.txt Download

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000004
   RAMM0           	: origin = 0x0000F3, length = 0x00000D


   RAML0_PRG  	        : origin = 0x008000, length = 0x000FD0
   RAML0BOOT_PRG        : origin = 0x008FD0, length = 0x000020
   //RAMLS0          	: origin = 0x008000, length = 0x000800
  //RAMLS1          	: origin = 0x008800, length = 0x000800
  //RAMLS2      	: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   
   //RAMLS5           : origin = 0x00A800, length = 0x000800
   //RAMLS6           : origin = 0x00B000, length = 0x000800
   //RAMLS7           : origin = 0x00B800, length = 0x000800
   
   RAMLS8           : origin = 0x014000, length = 0x002000  // When configured as CLA program use the address 0x4000
   RAMLS9           : origin = 0x016000, length = 0x002000  // When configured as CLA program use the address 0x6000
   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Flash sectors */
   /* BANK 0 */
  // FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE	/* on-chip Flash */
  //  FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */
  //  FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000	/* on-chip Flash */
      APPVEC 	   	: origin = 0x081000, length = 0x000010
      FLASH             : origin = 0x081010, length = 0x01EDEF
      CINIT		: origin = 0x09FDFF, length = 0x000200
      APPCRC	        : origin = 0x09FFFF, length = 0x000001
      BOOTVEC 	        : origin = 0x0A0000, length = 0x000040
      RAMFLASH	        : origin = 0x0A0040, length = 0x000020
      LIB_FLASH         : origin = 0x0A0060, length = 0x000500
      FLASH_BOOT        : origin = 0x0A0560, length = 0x001AA0     /* on-chip FLASH */


      IQTABLES 		: origin = 0x3FF000, length = 0x000b50
      ROM 		: origin = 0x3FFB50, length = 0x000386
      RSVD1		: origin = 0x3FFED6, length = 0x0000E3
      FLASH_API		: origin = 0x3FFFB9, length = 0x000001
      VERSION		: origin = 0x3FFFBA, length = 0x000002
      CHECKSUM		: origin = 0x3FFFBC, length = 0x000004
      VECTORS 		: origin = 0x3FFFC2, length = 0x000040



//   FLASH_BANK1_SEC15_RSVD : origin = 0x09FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   /* Flash Banks (128 sectors each) */
 //  FLASH_BANK0     : origin = 0x090000, length = 0x10000
   FLASH_BANK1     : origin = 0x0A2000, length = 0x1E000
   FLASH_BANK2     : origin = 0x0C0000, length = 0x20000
   FLASH_BANK3     : origin = 0x0E0000, length = 0x20000
   FLASH_BANK4     : origin = 0x100000, length = 0x07FFF

   GS0RAM      : origin = 0x00C000, length = 0x001FFF


PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x0000F1     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   IsrVariable : origin = 0x00A800, length = 0x000800	  /* ISR variable define */
   RAMLS5      : origin = 0x00B000, length = 0x001000//拓展了RAMLS5的空间，原本的长度过小编译报错
   //GS0RAM      : origin = 0x00C000, length = 0x001FFF
   GS1RAM      : origin = 0x00E000, length = 0x000FFF
   CLARAM      : origin = 0x00F000, length = 0x000FFF
   GS2RAM      : origin = 0x010000, length = 0x001FFF
   GS3RAM      : origin = 0x012000, length = 0x001FFF
//   RAMGS3_RSVD : origin = 0x013FF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   CLATOCPURAM      : origin = 0x001480,   length = 0x000080
   CPUTOCLARAM      : origin = 0x001500,   length = 0x000080
   CLATODMARAM      : origin = 0x001680,   length = 0x000080
   DMATOCLARAM      : origin = 0x001700,   length = 0x000080
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0, ALIGN(8)
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   .cinit	    : > CINIT      PAGE = 0, ALIGN(8)
   .text	    : > FLASH      PAGE = 0, ALIGN(8)
   .init	    : LOAD = FLASH_BOOT      PAGE = 0
	{
		/*
		DSP280x_Adc.obj (.text)
		DSP280x_EPwm.obj (.text)
		DSP280x_ECap.obj (.text)
		*/
		f28004x_PieCtrl.obj (.text)
		f28004x_PieVect.obj (.text)
		f28004x_CpuTimers.obj (.text)
		f28004x_DefaultIsr.obj (.text)
	//	DSP280x_ECan.obj (.text)
		f28004x_Gpio.obj (.text)
		f28004x_I2C.obj (.text)
		f28004x_MemCopy.obj (.text)
		f28004x_SysCtrl.obj (.text)
		f28004x_can.obj (.text)
   	}

    .cal  : > LIB_FLASH      PAGE = 0
	{		
		-lrts2800_fpu32.lib (.text)
		-lrts2800_fpu32.lib(.cinit)
		-lFAPI_F28P55x_COFF_v4.00.00.lib(.text)
	}




    bootramfuncs        : LOAD = RAMFLASH,ALIGN(8)
                         RUN = RAML0BOOT_PRG,
                         LOAD_START(_BootRamfuncsLoadStart),
                         LOAD_END(_BootRamfuncsLoadEnd),
                         RUN_START(_BootRamfuncsRunStart),
                         PAGE = 0
   IsrRamfuncs            : LOAD = FLASH, ALIGN(8)
                         RUN = GS0RAM,
                         LOAD_START(_IsrRamfuncsLoadStart),
                         LOAD_END(_IsrRamfuncsLoadEnd),
                         RUN_START(_IsrRamfuncsRunStart),
                         PAGE = 0

    //lzy 2010624 for cla
  /*  Cla1Prog            : LOAD = FLASH,
                         RUN = RAMCLA_PRG,
                         LOAD_START(_Cla1funcsLoadStart),
                         LOAD_END(_Cla1funcsLoadEnd),
                         RUN_START(_Cla1funcsRunStart),
                         PAGE = 0
						 */
  /* csmpasswds          : > CSM_PWL_P0  PAGE = 0*/

   .appvec             : > APPVEC   PAGE = 0
   appcrc              : > APPCRC   PAGE = 0
   .bootvec            : > BOOTVEC  PAGE = 0
   FlashBoot           : > FLASH_BOOT      PAGE = 0

  // csmpasswds          : > CSM_PWL     PAGE = 0
  // csm_rsvd            : > CSM_RSVD    PAGE = 0

   /* Allocate uninitalized data sections: */

   .stack              : > RAMM1       PAGE = 1
   .ebss               : > RAMLS5      PAGE = 1
   /*.esysmem            : > RAML3       PAGE = 1*/

//   SinbackbakFile     : > FLASH      PAGE = 0//lzy 20100624 for cla
   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASH      PAGE = 0, ALIGN(8)
   .switch             : > FLASH      PAGE = 0, ALIGN(8)
   .const              : > FLASH      PAGE = 0, ALIGN(8)
   /* Allocate IQ math areas: */
   IQmath              : > FLASH      PAGE = 0, ALIGN(8)            /* Math Code */
   IQmathTables        : > FLASH      PAGE = 0, ALIGN(8)


   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */

   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT


/*******************************************************************/
/*	These addresses reside in the RAM section and are hard coded */
/* in the linker command files because the liker cannot be trusted */
/* to put them where we want them.  They have to stay the same for */
/* the first and second level boot loaders and the application.    */
/*******************************************************************/

	/* ESNA protocal variants define*/
	/*common variants*/	
	{_ulENP_Lo_SN		     = 0x07F2;}/*Hi & Lo Extended Winline Serial Number */
	{_ulENP_Lo_SN_H		     = 0x07F3;}/* Note7(A23-A16),Hi_SN(A15-A00),Lo_SN(A23-A00)*/
	{_ulENP_Hi_SN		     = 0x07F4;}
	{_ulENP_Hi_SN_H		     = 0x07F5;}/* all 48 bits */
	{_g_u16WriteNumber	     = 0x07F6;}
	{_g_u16I2CErrorType	     = 0x07F7;}
	{_g_u16MdlStatus         		= 0x07F8;}
	{_g_u16WaitLoopCount     = 0x07FA;}
	{_g_u16RdEepromOk	     = 0x07FB;}
	{_g_u16PfcStatus	     	     = 0x07FC;}
	{_g_u16PfcCtrl		     = 0x07FD;}
	{_g_u16MdlAddr 		     = 0x07FE;}	
	{_g_u16FromApplication      = 0x07FF;}
	// memory change mbh20170905



	{_g_fRdTemp			     = 0xD000;}
	{_ECana32Temp		     = 0xD002;}
	{_g_u16VersionNoSw       =0xD004;}    //Hexl
	{_g_u16TempLimitMode    =0xD006;}    //Hexl
	{_g_u16CanProtocolFlag    =0xD007;}
	{_g_u16MdlAddrMode    =  0xD008;}     //zkx
	{_g_u16SongYangFlag      = 0xD009;}
	{ _g_u16CurrRefCons    =  0xD00A;}     //zkx
	{_g_u16DcOTPSWFlag      = 0xD00B;}  //zkx
	
	{_g_lq12VoltSampSysa	 =0xD00C;}
	{_g_lq12VoltSampSysb	 =0xD00E;}
	{_g_lq12VoltConSysa	 	 =0xD010;}
	{_g_lq12VoltConSysb	 	 =0xD012;}
	{_g_lq10CurrSampSysa	 =0xD014;}
	{_g_lq10CurrSampSysb	 =0xD016;}
	{_g_lq10CurrConSysa_C2	 	 =0xD018;}
	{_g_lq10CurrConSysb_C2	 	 =0xD01A;}
	{_g_lq10PowerConSysa	 =0xD01C;}
	{_g_lq10PowerConSysb	 =0xD01E;}
	{_g_lq10MdlVoltUp		 =0xD020;}
	{_g_lq10MdlTempUp		 =0xD022;}
	{_g_lq10ReonTime			=0xD024;}
	{_g_lq10OpenTime			=0xD026;}
	{_g_lq10RunTime			=0xD028;}
	{_g_lq10MaintainTimes		=0xD02A;}
	{_g_lq10AcCurrFt			=0xD02C;}
	{_g_lq10WalkInTime       =0xD02E;}
	{_g_lq10MdlPowerFt       =0xD030;}
	{_g_lq10SetPower         =0xD032;}
	{_g_lq10MdlCurrFt        =0xD034;}
	{_g_lq10SetLimit         =0xD036;}
	{_g_lq10MdlVoltFt        =0xD038;}
	{_g_lq10SetVolt		=0xD03A;}
	{_g_u16MdlCtrl		=0xD03C;}
	{_g_u16EpromWr		=0xD03D;}
	{_g_u16BarCode0H         =0xD03E;}
	{_g_u16BarCode0L         =0xD03F;}
	{_g_u16BarCode1H         =0xD040;}
	{_g_u16BarCode1L         =0xD041;}
	{_g_u16BarCode2H         =0xD042;}
	{_g_u16BarCode2L         =0xD043;}
	{_g_u16BarCode3H         =0xD044;}
	{_g_u16BarCode3L         =0xD045;}
	{_g_u16MaintainData0H    =0xD046;}
	{_g_u16MaintainData0L    =0xD047;}
	{_g_u16MaintainData1H    =0xD048;}
	{_g_u16MaintainData1L    =0xD049;}
	{_g_u16CharactData0H     =0xD04A;}
	{_g_u16CharactData0L     =0xD04B;}
	{_g_u16NodeId0H          =0xD04C;}
	{_g_u16NodeId0L          =0xD04D;}
	{_g_u16NodeId1H		=0xD04E;}
	{_g_u16NodeId1L		=0xD04F;}
	{_g_u16VersionNoHw		=0xD050;}
	{_g_u16MdlStatusEx		=0xD051;}/*add for HVDC*/
	/*{_g_lq10TempAmbiDisp	=0xC052;}*/	/*delete for HVDC*/
	{_g_lTempDcdc_HS		=0xD052;}/*add for HVDC,0x8F92-0x8F93*/
	
	{_g_u16FlagBootLoader	 =0xD060;}//从0x8FA0~0x8FFF之间的数据不会在InitRam中被初始化为0
	{_g_u16FlagPFCFd		 =0xD061;}//PFC侧强制下载标志位
   	 {_g_lq10HighTempRunTime  =0xD062;}
   	 {_g_lq10MdlSwitchVolt = 0xD064;}
   	 {_g_u16_WrAliModeEn = 0xD067;}
   	 {_g_u16_ALIMODE = 0xD068;}
   	 {_g_u16Function = 0xD069;}
   	 {_g_u16U1Status	     	     = 0xD06A;}


	{_g_lq10PfcCurrentWarn    = 0xD06C;}
	{_g_lq10DcdcCurrentWarn   = 0xD06E;}
	{_g_lq10PfcPastWarn       = 0xD070;}
	{_g_lq10DcdcPastWarn      = 0xD072;}
	{_g_lq10PfcLastWarn       = 0xD074;}
	{_g_lq10DcdcLastWarn      = 0xD076;}
	{_g_lq10VoltSet           = 0xD078;}
	{_g_lq10IlimitSet         = 0xD07A;}
	{_g_lq10VoltOut           = 0xD07C;}
	{_g_lq10IlimitOut         = 0xD07E;}
	{_g_lq10AmbiotTempWarn    = 0xD080;}
	{_g_lq10DcdcTempWarn      = 0xD082;}
	{_g_lq10PfcTempWarn       = 0xD084;}
	{_g_lq10MdlVinWarn		= 0xD086;}
	{_g_lq10WarnWriteTimes    = 0xD088;}
	{_g_lq10WarnEnableFlag    = 0xD08A;}
	{_g_lq10FactoryTestFlag   = 0xD08C;}
	{_g_lq10FactoryAgedPower  = 0xD08E;}
	{_g_lAgedTimeJudge        = 0xD090;}
	{_g_u16LEDDebugFlag      = 0xD093;}
	{_g_u16RunFlag              =0xD094;}
	{_g_u16AmbTempSet 	=0xD095;}

	{_g_u32FunctionNum    =0xD09A;}
	
	{_g_lq10OutputPower      = 0xD0A0;}
	{_g_u16FanAdjustFlag		=0xD0A2;}
	{_g_u16FanSpeed			=0xD0A3;}
	{_g_u16WorkModeSwitch	=0xD0A4;}
	{_g_u16WorkModeFastSw=0xD0A5;}

	{_g_lq10MdlExtVolt	 =0xD0A6;}
	{_g_lq10MdlIntVolt	 =0xD0A8;}

	{_g_lq10CurrConSysa1_C2 =0xD0AA;}
	{_g_lq10CurrConSysb1_C2 =0xD0AC;}

	{_g_lq10CurrSampSysa1	 =0xD0AE;}
	{_g_lq10CurrSampSysb1	 =0xD0B0;}
	{_g_u16U1WarnStatusEX =0xD0B2;}
	{_g_u16DcCurrRegStep =0xD0B3;}
	{_g_lq10D2CompenstionTrue =0xD0B4;}
	{_g_lq10D3CompenstionTrue =0xD0B6;}

	{_g_lq10Curr2SampSysa	 =0xD0B8;}
	{_g_lq10Curr2SampSysb	 =0xD0BA;}
	{_g_lq10Curr2SampSysa1	 =0xD0BC;}
	{_g_lq10Curr2SampSysb1	 =0xD0BE;}
	{_g_u16CALIBRFAILBit	 =0xD0C0;}

	{_g_u16U1WarnStatus =0xD0C1;}
	{_g_u16U1RunStatus =0xD0C2;}
	{_g_u16U1Ctrl =0xD0C3;}

	{_g_lq10CurrConSysa_C1	 	 =0xD0C4;}
	{_g_lq10CurrConSysb_C1	 	 =0xD0C6;}
	{_g_lq10CurrConSysa1_C1 =0xD0C8;}
	{_g_lq10CurrConSysb1_C1 =0xD0CA;}
	{_g_lq10TempCtrl =0xD0CC;}

	{_g_u16OCPFlag	 =0xD0CE;}

	{_g_lq10IbusSampSysa	 	 =0xD0D0;}
	{_g_lq10IbusSampSysb	 	 =0xD0D2;}
	{_g_lq10IbusSampSysa1	 	 =0xD0D4;}
	{_g_lq10IbusSampSysb1	 	 =0xD0D6;}
	{_g_u16HLVoltMode	 	 =0xD0D8;}
	{_FBSetFlag3	 	 =0xD0D9;}
    	{_g_lq10DCTempUp		 =0xD0DA;}
	{_g_u16VINandVbus_ADset      = 0xD0DC;}
	{_FBSetFlag4	 	 =0xD0DE;}
	{_u16cnt = 0xD0DF;}
	{_oReturnCheck = 0xD0E0;}
	{_oFlashStatus = 0xD0E1;}
	{_g_u32RESCData = 0xD0E2;}
	{_g_u32OCPDelayCnt = 0xD0E4;}
	{_g_u32OCPDelaySet = 0xD0E6;}
	{_g_u16InterruptPoint = 0xD0E8;}
	{_g_u16NormalPoint = 0xD0E9;}
	{_Erase_Sector1 = 0xD0EA;}

/***************************************************************************/
	{_Application_Entry_Point   = 0x081000;}	
	{_ApplicationValidPointer	= 0x81006;}
	/*{_InitECanaIDPointer		= 0x8100A;}*/
	{_SendBlockRequestPointer	= 0x8102E;}
	{_GetHeaderPointer			= 0x81030;}
	{_GetDataBlockPointer		= 0x81032;}
	{_StartTimerPointer			= 0x81034;}
	{_TimeIsUpPointer			= 0x81036;}
	{_ProcessInquiryPointer		= 0x81038;}





}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Skyler Baumer 3 months ago in reply to Ethan Tian

TI__Expert 6345 points

Hi Ethan,

Ethan Tian said:
execution of the Fapi_setupBankSectorEnable() function fails,

What exactly do you mean? Are the first 8 sectors not being protected from erase? Can you provide more details on the flow and where you are seeing failures during the process? For example, what is the PC when the device locks up after a firmware upgrade? I suspect that some area of flash is getting erased that is not intended and the device is trying to execute instructions in this flash region.

Kind regards,

Skyler

0 zhuoru zhong 3 months ago in reply to Skyler Baumer

Prodigy 10 points

Hi Skyler,

Only the first sector is protected from erase.And what does PC exactly mean?

0 Skyler Baumer 3 months ago in reply to zhuoru zhong

TI__Expert 6345 points

Hi Zhuoru,

You're right, it should only be the first sector protected from erase.

zhuoru zhong said:
And what does PC exactly mean?

I was asking about what the program counter is set to when you see errors after the upgrade. I want to see where in flash that these errors are occurring.

Kind regards,

Skyler

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28P550SJ: OTA issue