Part Number: TMS320F28379D
Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
I am trying to use SCIB from CPU2 on a LaunchPAD-F28379D and having issues. Here is what I have done:
- Created a modified sci example which is essentially a merging of sci_ex2_loopback_interrupts and sci_ex3_echoback so the example is doing the echo back with interrupts. This is loaded on CPU1 and everything seems to work.
- Run a couple of dual examples such as:
- sci_ex2_sysconfig_cpu1/sci_ex2_sysconfig_cpu2 (modified to use SCIB on the launchpad (doesn't work)
- ipc_ex4_msgqueue_sysconfig_c28x1/2 plain (does work but no SCIB present, just plain IPC)
- ipc_ex4_msgqueue_sysconfig_c28x1/2 modified to include sci echo back code (doesn't work)
The plain ipc_ex4_msgqueue_sysconfig example runs on both cpus and exchanges a message through the IPC. So there is some success with dual-core.
When trying to do dual core with SCI code, the registers for SCIB do not seem to be writable from CPU2. Specifically, SCI_enableModule() for SCIB does not change the SCICTL1 register at all. The value stays at 0. I have stepped through the code and there are no changes. Stepping through the code when running on CPU1 does change the register as expected.
CPU1 seems to be setting up the pinmux registers correctly and does this before CPU2 tries to initialize the SCIB. CPU1 sets up the pinmux registers before the CPUs are synchronized and CPU2 initializes the SCIB after the synchronization.
Is there something else that is supposed to be done? Is it reasonable to expect to see SCIB registers (0x7210) change in the memory view? This works when it is on CPU1.
Thanks.
