TMS320F280049C: CLA Not running getting unknown path source

Hi Subash,

This error just means that CCS is looking for that specific file (to show the symbols in the viewer) in the wrong location. Can you click "Locate File..." and navigate to [C2000ware install on your local machine]/driverlib/f28004x/driverlib/flash.c to help CCS find the flash.c file?

Best Regards,

Delaney

Hi Delaney ,

After locating particular path its can able to debug but debug showing below  mention error how i can solve this issue 

 Break at address "0xa28e" with no debug information available, or outside of program code.

during debug its going for flash init why its happening and how i can solve   

Hi Subash, 

When you see this error, what context is the debugger in (CPU or CLA)? Can you outline the steps you are doing to connect via CCS in order?

This could either be an issue with the connection steps or a memory allocation issue for the CLA code. 

Best Regards,

Delaney

Hi Delaney ,

This error during debugging the CLA .

Step1:Load the program.

Step2:select the cla debug and load the symbol then connect the target next Run.

Step3:Run the cpu .

during debugging the CLA  its going for Flash init module (_RamfuncsRunStart) i think its memory issue please find the memory allocation details below and stack information 

MEMORY
{
PAGE 0 :

RAMM0 : origin = 0x0000F5, length = 0x00030B

// RAMLS0 : origin = 0x008000, length = 0x000800
//RAMLS1 : origin = 0x008800, length = 0x000800
//RAMLS2 : origin = 0x009000, length = 0x000800
//RAMLS3 : origin = 0x009800, length = 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800

RAMLS0_1_2_3_4 : origin = 0x008000, length = 0x002800
RESET : origin = 0x3FFFC0, length = 0x000002

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 20012000
GROUP { /* GROUP memory ranges for crc/checksum of entire flash */
#endif
#endif
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x086000, length = 0x000010

/* Flash sectors */
/* BANK 0 */
FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC6 : origin = 0x086010, length = 0x000FF0 /* on-chip Flash */
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */

/* BANK 1 */
FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC7_8_9_10_11 : origin = 0x097000, length = 0x005000 /* on-chip Flash */
FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 20012000
} crc(_table_name, algorithm=C28_CHECKSUM_16)
#endif
#endif

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x00080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080

RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6 : origin = 0x00B000, length = 0x000800
RAMLS7 : origin = 0x00B800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x002000
RAMGS1 : origin = 0x00E000, length = 0x002000
RAMGS2 : origin = 0x010000, length = 0x002000
RAMGS3 : origin = 0x012000, length = 0x002000
}

SECTIONS
{
codestart : > BEGIN, PAGE = 0, ALIGN(4)
.text : >>FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 | FLASH_BANK0_SEC8 | FLASH_BANK0_SEC9 | FLASH_BANK0_SEC10 | FLASH_BANK0_SEC11 | FLASH_BANK0_SEC12, PAGE = 0, ALIGN(4)
.cinit : > FLASH_BANK0_SEC13 | FLASH_BANK0_SEC14 | FLASH_BANK0_SEC15 , PAGE = 0, ALIGN(4)
.pinit : > FLASH_BANK0_SEC8, PAGE = 0, ALIGN(4)
.switch : > FLASH_BANK0_SEC8, PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS5|RAMLS6|RAMLS7|RAMGS0, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
.econst : > FLASH_BANK0_SEC13, PAGE = 0, ALIGN(4)

ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1

.TI.ramfunc : {} LOAD = FLASH_BANK0_SEC13 | FLASH_BANK0_SEC14,
RUN = RAMLS0_1_2_3_4,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

/* crc/checksum section configured as COPY section to avoid including in executable */
.TI.memcrc : type = COPY

#if !(CLA_MATH_TABLES_IN_ROM)
//
//Load tables to Flash and copy over to RAM
//
CLA1mathTables : LOAD = FLASH_BANK0_SEC6,
RUN = RAMLS4,
RUN_START(_CLA1mathTablesRunStart),
LOAD_START(_CLA1mathTablesLoadStart),
LOAD_SIZE(_CLA1mathTablesLoadSize),
PAGE = 0
#endif
Cla1Prog : LOAD = FLASH_BANK1_SEC7_8_9_10_11,
RUN = RAMLS0_1_2_3_4,
RUN_START(_Cla1ProgRunStart),
LOAD_START(_Cla1ProgLoadStart),
LOAD_SIZE(_Cla1ProgLoadSize),
PAGE = 0
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1

#ifdef CLA_C
//
// CLA C compiler sections
//
// Must be allocated to memory the CLA has write access to
//
.scratchpad : > RAMLS5, PAGE = 1
.bss_cla : > RAMLS5, PAGE = 1
.const_cla : > RAMLS5, PAGE = 1
#endif
FPUmathTables :>FLASH_BANK0_SEC6, PAGE = 0
Cla1DataRam : > RAMLS5 | RAMLS6, PAGE = 1
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Kindly check this and give me some solution to run the CLA .

Regards,

Subash 

above screenshot cla working condition  below screenshot CLA its not running CLA  its going for Flash init module (_RamfuncsRunStart) 

Hi Subash,

Can you try to below steps in order to debug on both cores:

1. Launch target configuration
   
   1. both cores should be disconnected
2. "Connect Target" for the c28x
   1. c28x will be suspended  
   2. It may throw an error about not having the debug information at this point, that can be ignored
3. Load the .out file onto the c28x (Run >> Load >> Load Program >> [navigate to the .out file])
   1. c28x will be suspended still
4. "Connect Target" for the CLA
   1. both cores will be suspended
5. Load the .out symbols onto the CLA (Run >> Load >> Load symbols >> [navigate to the .out file])
6. Switch context to the c28x (click on it in the debug window) and Resume
7. Switch context back to the CLA and you should see it stop at the __mdebugstop();

For the linker cmd files, did you make any modifications to the files from the ones provided by C2000ware? if so, can you list the modifications made + reasoning so I can help you figure out if that could be causing the issue?

Best Regards,

Delaney