TMS320F280033: File Loader: Verification failed: Values at address 0x080000@Program do not match (expected: 0x0048, actual: 0xFFFF) Please verify target memory and memory map.

Part Number: TMS320F280033
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE, TMS320F280039C

Tool/software:

Hi,

I need to make a test program for one of our projects. I created a new program using the project wizard, with target F280033 and selected example empty_project_80pn, which corresponds to my target. Then I edited the sysconfig file as needed (changed only a few GPIO default state).

I first programmed with the RAM build, and it worked. But then, I tried to program it with the FLASH build, and got the error :

File Loader: Verification failed: Values at address 0x080000@Program do not match (expected: 0x0048, actual: 0xFFFF) Please verify target memory and memory map.

The sysconfig configuration is correct for the target, so is the target configuration file.

However, when I look at the project properties, I see that the project was configured automatically for the wrong target :

For some reason, I can't change this. I have tried to edit directly the .cproject file, but it reverted to the original setting.

How can I fix this ?

I am a bit worried, because the actual (non-test) code for this project was first developed for the launchpad, and will have to be migrated to an F280033 target too, and I fear I will run into the same issues.

Thanks in advance for your help,

Best regards,

Adrien

  • Hi Adrien,

    Thank you for bringing this to our attention. Can you please help provide the C2000Ware version you are using, CCS version, and SysConfig version (within CCS install path > ccs > utils) so that I can look into this issue more closely?

    with target F280033 and selected example empty_project_80pn

    Where did you see this example?

    Best Regareds,

    Marlyn

  • Hi Marilyn,

    I use

    • CCS Version: 20.2.0.12__1.8.0
    • Sysconfig either 1.23.0 or 1.24.0 (both are installed)
    • C2000Ware 5_05_00_00 (where I found the example)

    And once the project is created, in the project properties :

    Clicking on the arrow in the box for "TMS320F280039C" does nothing at all.

    That being said, I am not even sure that's the issue...

    Best regards,

    Adrien

  • Hi Adrien,

    Thank you for sharing more information. We are looking into this issue. I hope to be able to provide more details before the end of this week.

    Best Regards,

    Marlyn

  • Hi Adrien,

    Within the dependencies of the project properties, can you please add SysConfig to the list of dependencies. You should have the option to select a CCS version. We added support for F280033 in SysConfig version 1.24 so you will need at least that version in the project for it to detect F280033.

    Best Regards,
    Marlyn

  • Hi Marlyn,

    I forced Sysconfig to version 1.24 in the project properties.

    I still can't change the device / variante to F280033, it is stuck to F280039C. And the error remain.

    Sysconfig is seems to be properly configured though.

    Any idea what is going on ?

    Thanks in advance,

    Best regards,

    Adrien

  • Hi Adrien,

    The expert is currently out of office and will get back to you when they return next week.

    Thank you,

    AJ Favela 

  • Hi Adrien,

    Have you rebuilt the project yet?

    Best Regards,

    Marlyn

  • Hi Marlyn,

    Sorry for the delayed response, I was out of office for the summer holidays.

    As explained in my previous post (july 29th), I rebuilt the project using sysconfig 1.24, and the error is still there. I was waiting for more suggestions on your side.

    Best regards,

    Adrien

  • Hi Adrien,

    No worries, hopefully you had a good break.

    Can you please delete the project and try again? When I try it on my side, I don't get any errors.

    I will also reassign this question to someone on our CCS team so they can look into the sysconfig versions more closely. 

    Best Regards,

    Marlyn

  • Hi Marlyn,

    CCS got an update, I deleted the project and created a new one with the new toolchain (C2000Ware 6.0). Unfortunately, the issue remains the same :

    When I go in the project properties, the variant is still stuck to F280039C instead of F280033

    I will very soon need to hand over some code to the hardware team, and it will require to work from flash (they won't reprogram the MCU for each test !). I really need to be able to program these microcontrollers !

    Thanks in advance,

    Best regards,

    Adrien

  • Hello Adrien,

    When I go in the project properties, the variant is still stuck to F280039C instead of F280033

    I would need to confirm this but I believe that the device shown in the device variant does not update to show the change made to the sysconfig project. What the device is configured for in the sysconfig file should be what is relevant here, along with the dependent files generated by sysconfig. 

    I would focus on the data verification error. There looks to be a mismatch between the information in the linker command file and the debugger memory map. Can you confirm that they line up correctly?

    Thanks

    ki

  • Hello Ki,

    Where can I find the debugger memory map, please ? I am not sure what you are refering to.

    Thanks in advance,

    Adrien

  • Hello  Ki,

    At first glance, it seems to match.

    Here are the files :

    f28003x_generic_flash_lnk.cmd

    MEMORY
    {
       BEGIN            : origin = 0x00080000, length = 0x00000002
       BOOT_RSVD        : origin = 0x00000002, length = 0x00000126
    
       RAMM0            : origin = 0x00000128, length = 0x000002D8
       RAMM1            : origin = 0x00000400, length = 0x000003F8
       // RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMLS0           : origin = 0x00008000, length = 0x00000800
       RAMLS1           : origin = 0x00008800, length = 0x00000800
       RAMLS2           : origin = 0x00009000, length = 0x00000800
       RAMLS3           : origin = 0x00009800, length = 0x00000800
       RAMLS4           : origin = 0x0000A000, length = 0x00000800
       RAMLS5           : origin = 0x0000A800, length = 0x00000800
       RAMLS6           : origin = 0x0000B000, length = 0x00000800
       RAMLS7           : origin = 0x0000B800, length = 0x00000800
    
       RAMGS0           : origin = 0x0000C000, length = 0x00001000
       RAMGS1           : origin = 0x0000D000, length = 0x00001000
       RAMGS2           : origin = 0x0000E000, length = 0x00001000
       RAMGS3           : origin = 0x0000F000, length = 0x00000FF8
       // RAMGS3_RSVD      : origin = 0x0000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       BOOTROM          : origin = 0x003F8000, length = 0x00007FC0
       SECURE_ROM       : origin = 0x003F2000, length = 0x00006000
    
       RESET            : origin = 0x003FFFC0, length = 0x00000002
    
       /* Flash sectors */
       /* BANK 0 */
       FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE
       FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000
       FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000
       FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000
       FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000
       FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000
       FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000
       FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000
       FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000
       FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000
       FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000
       FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000
       FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000
       FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000
       FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000
       FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000
    
       /* BANK 1 */
       FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000
       FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000
       FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000
       FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000
       FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000
       FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000
       FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000
       FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000
       FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000
       FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000
       FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000
       FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000
       FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000
       FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000
       FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000
       FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000
    
      /* BANK 2 */
       FLASH_BANK2_SEC0  : origin = 0x0A0000, length = 0x001000
       FLASH_BANK2_SEC1  : origin = 0x0A1000, length = 0x001000
       FLASH_BANK2_SEC2  : origin = 0x0A2000, length = 0x001000
       FLASH_BANK2_SEC3  : origin = 0x0A3000, length = 0x001000
       FLASH_BANK2_SEC4  : origin = 0x0A4000, length = 0x001000
       FLASH_BANK2_SEC5  : origin = 0x0A5000, length = 0x001000
       FLASH_BANK2_SEC6  : origin = 0x0A6000, length = 0x001000
       FLASH_BANK2_SEC7  : origin = 0x0A7000, length = 0x001000
       FLASH_BANK2_SEC8  : origin = 0x0A8000, length = 0x001000
       FLASH_BANK2_SEC9  : origin = 0x0A9000, length = 0x001000
       FLASH_BANK2_SEC10 : origin = 0x0AA000, length = 0x001000
       FLASH_BANK2_SEC11 : origin = 0x0AB000, length = 0x001000
       FLASH_BANK2_SEC12 : origin = 0x0AC000, length = 0x001000
       FLASH_BANK2_SEC13 : origin = 0x0AD000, length = 0x001000
       FLASH_BANK2_SEC14 : origin = 0x0AE000, length = 0x001000
       FLASH_BANK2_SEC15 : origin = 0x0AF000, length = 0x000FF0
    
    // FLASH_BANK0_SEC15_RSVD     : origin = 0x0AFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN, ALIGN(8)
       .text            : >> FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3 | FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 | FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 | FLASH_BANK0_SEC8 | FLASH_BANK0_SEC9,  ALIGN(8)
       .cinit           : > FLASH_BANK0_SEC1,  ALIGN(8)
       .switch          : > FLASH_BANK0_SEC1,  ALIGN(8)
       .reset           : > RESET,                  TYPE = DSECT /* not used, */
    
       .stack           : > RAMM0 | RAMM1
    
    #if defined(__TI_EABI__)
       .init_array      : > FLASH_BANK0_SEC1,  ALIGN(8)
       .bss             : > RAMLS5
       .bss:output      : > RAMLS3
       .bss:cio         : > RAMLS0
       .data            : >> RAMLS5 | RAMLS6
       .sysmem          : > RAMLS5
       .const           : >> FLASH_BANK1_SEC0 | FLASH_BANK1_SEC1,  ALIGN(8)
    #else
       .pinit           : > FLASH_BANK0_SEC1,  ALIGN(8)
       .ebss            : > RAMLS5
       .esysmem         : > RAMLS5
       .cio             : > RAMLS0
       .econst          : > FLASH_BANK0_SEC4,  ALIGN(8)
    #endif
    
        ramgs0 : > RAMGS0
        ramgs1 : > RAMGS0
    
        /*  Allocate IQ math areas: */
       IQmath           : > FLASH_BANK0_SEC1, ALIGN(8)
       IQmathTables     : > FLASH_BANK0_SEC2, ALIGN(8)
       DMABuffers       : > RAMGS0
    
       .TI.ramfunc      : LOAD = FLASH_BANK0_SEC1,
                          RUN = RAMLS0,
                          LOAD_START(RamfuncsLoadStart),
                          LOAD_SIZE(RamfuncsLoadSize),
                          LOAD_END(RamfuncsLoadEnd),
                          RUN_START(RamfuncsRunStart),
                          RUN_SIZE(RamfuncsRunSize),
                          RUN_END(RamfuncsRunEnd),
                          ALIGN(8)
    
    }
    

    empty_sysconfig_80pn.map

    ******************************************************************************
                 TMS320C2000 Linker PC v22.6.2                     
    ******************************************************************************
    >> Linked Tue Aug 26 14:43:33 2025
    
    OUTPUT FILE NAME:   <empty_sysconfig_80pn.out>
    ENTRY POINT SYMBOL: "code_start"  address: 00080000
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
      BOOT_RSVD             00000002   00000126  00000000  00000126  RWIX
      RAMM0                 00000128   000002d8  00000000  000002d8  RWIX
      RAMM1                 00000400   000003f8  00000200  000001f8  RWIX
      RAMLS0                00008000   00000800  0000012e  000006d2  RWIX
      RAMLS1                00008800   00000800  00000000  00000800  RWIX
      RAMLS2                00009000   00000800  00000000  00000800  RWIX
      RAMLS3                00009800   00000800  00000000  00000800  RWIX
      RAMLS4                0000a000   00000800  00000000  00000800  RWIX
      RAMLS5                0000a800   00000800  0000000a  000007f6  RWIX
      RAMLS6                0000b000   00000800  00000000  00000800  RWIX
      RAMLS7                0000b800   00000800  00000000  00000800  RWIX
      RAMGS0                0000c000   00001000  00000000  00001000  RWIX
      RAMGS1                0000d000   00001000  00000000  00001000  RWIX
      RAMGS2                0000e000   00001000  00000000  00001000  RWIX
      RAMGS3                0000f000   00000ff8  00000000  00000ff8  RWIX
      BEGIN                 00080000   00000002  00000002  00000000  RWIX
      FLASH_BANK0_SEC0      00080002   00000ffe  00000000  00000ffe  RWIX
      FLASH_BANK0_SEC1      00081000   00001000  00000140  00000ec0  RWIX
      FLASH_BANK0_SEC2      00082000   00001000  0000095d  000006a3  RWIX
      FLASH_BANK0_SEC3      00083000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC4      00084000   00001000  00000221  00000ddf  RWIX
      FLASH_BANK0_SEC5      00085000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC6      00086000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC7      00087000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC8      00088000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC9      00089000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC10     0008a000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC11     0008b000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC12     0008c000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC13     0008d000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC14     0008e000   00001000  00000000  00001000  RWIX
      FLASH_BANK0_SEC15     0008f000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC0      00090000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC1      00091000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC2      00092000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC3      00093000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC4      00094000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC5      00095000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC6      00096000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC7      00097000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC8      00098000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC9      00099000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC10     0009a000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC11     0009b000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC12     0009c000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC13     0009d000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC14     0009e000   00001000  00000000  00001000  RWIX
      FLASH_BANK1_SEC15     0009f000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC0      000a0000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC1      000a1000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC2      000a2000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC3      000a3000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC4      000a4000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC5      000a5000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC6      000a6000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC7      000a7000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC8      000a8000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC9      000a9000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC10     000aa000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC11     000ab000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC12     000ac000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC13     000ad000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC14     000ae000   00001000  00000000  00001000  RWIX
      FLASH_BANK2_SEC15     000af000   00000ff0  00000000  00000ff0  RWIX
      SECURE_ROM            003f2000   00006000  00000000  00006000  RWIX
      BOOTROM               003f8000   00007fc0  00000000  00007fc0  RWIX
      RESET                 003fffc0   00000002  00000000  00000002  RWIX
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    codestart 
    *          0    00080000    00000002     
                      00080000    00000002     f28003x_codestartbranch.obj (codestart)
    
    .cinit     0    00081130    00000012     
                      00081130    00000009     (.cinit..data.load) [load image, compression = lzss]
                      00081139    00000001     --HOLE-- [fill = 0]
                      0008113a    00000004     (__TI_handler_table)
                      0008113e    00000004     (__TI_cinit_table)
    
    .reset     0    003fffc0    00000000     DSECT
    
    .stack     0    00000400    00000200     UNINITIALIZED
                      00000400    00000200     --HOLE--
    
    .init_array 
    *          0    00081000    00000000     UNINITIALIZED
    
    .data      0    0000a800    0000000a     UNINITIALIZED
                      0000a800    00000006     rts2800_fpu32_eabi.lib : exit.c.obj (.data)
                      0000a806    00000002                            : _lock.c.obj (.data:_lock)
                      0000a808    00000002                            : _lock.c.obj (.data:_unlock)
    
    .const     0    00084000    00000221     
                      00084000    0000009b     driverlib.lib : flash.obj (.const:.string)
                      0008409b    00000001     --HOLE-- [fill = 0]
                      0008409c    0000009a                   : sysctl.obj (.const:.string)
                      00084136    00000098                   : gpio.obj (.const:.string)
                      000841ce    00000053     device.obj (.const:.string)
    
    .TI.ramfunc 
    *          0    00081000    0000012e     RUN ADDR = 00008000
                      00081000    00000049     driverlib.lib : flash.obj (.TI.ramfunc:Flash_initModule)
                      00081049    0000002c                   : flash.obj (.TI.ramfunc:Flash_setBankPowerMode)
                      00081075    00000024                   : flash.obj (.TI.ramfunc:Flash_setWaitstates)
                      00081099    0000001d                   : flash.obj (.TI.ramfunc:Flash_setPumpPowerMode)
                      000810b6    00000018                   : flash.obj (.TI.ramfunc:Flash_disableCache)
                      000810ce    00000018                   : flash.obj (.TI.ramfunc:Flash_disablePrefetch)
                      000810e6    00000017                   : flash.obj (.TI.ramfunc:Flash_enableCache)
                      000810fd    00000017                   : flash.obj (.TI.ramfunc:Flash_enablePrefetch)
                      00081114    00000016                   : flash.obj (.TI.ramfunc:Flash_enableECC)
                      0008112a    00000004                   : sysctl.obj (.TI.ramfunc)
    
    .text      0    00082000    0000095d     
                      00082000    00000123     driverlib.lib : sysctl.obj (.text:SysCtl_setClock)
                      00082123    000000fe                   : sysctl.obj (.text:SysCtl_isPLLValid)
                      00082221    000000ce     device.obj (.text:Device_enableAllPeripherals)
                      000822ef    00000088     rts2800_fpu32_eabi.lib : fs_div28.asm.obj (.text)
                      00082377    00000073     driverlib.lib : sysctl.obj (.text:DCC_setCounterSeeds)
                      000823ea    0000006a                   : gpio.obj (.text:GPIO_setAnalogMode)
                      00082454    00000065                   : sysctl.obj (.text:SysCtl_getClock)
                      000824b9    00000051     device.obj (.text:Device_init)
                      0008250a    0000004d     driverlib.lib : sysctl.obj (.text:SysCtl_selectOscSource)
                      00082557    00000046                   : sysctl.obj (.text:SysCtl_selectXTAL)
                      0008259d    00000045                   : sysctl.obj (.text:SysCtl_pollX1Counter)
                      000825e2    0000003d                   : interrupt.obj (.text:Interrupt_initModule)
                      0008261f    0000002e     rts2800_fpu32_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
                      0008264d    0000002b                            : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
                      00082678    00000029                            : exit.c.obj (.text)
                      000826a1    00000025     driverlib.lib : sysctl.obj (.text:SysCtl_selectXTALSingleEnded)
                      000826c6    00000024                   : sysctl.obj (.text:DCC_enableSingleShotMode)
                      000826ea    0000001e                   : sysctl.obj (.text:DCC_setCounter0ClkSource)
                      00082708    0000001e                   : sysctl.obj (.text:DCC_setCounter1ClkSource)
                      00082726    0000001e                   : interrupt.obj (.text:Interrupt_initVectorTable)
                      00082744    0000001d     rts2800_fpu32_eabi.lib : memcpy.c.obj (.text)
                      00082761    0000001a     driverlib.lib : sysctl.obj (.text:SysCtl_getLowSpeedClock)
                      0008277b    00000019                   : sysctl.obj (.text:SysCtl_setPLLSysClk)
                      00082794    00000017     device.obj (.text:SysCtl_enablePeripheral)
                      000827ab    00000017     driverlib.lib : sysctl.obj (.text:SysCtl_enablePeripheral)
                      000827c2    00000017     rts2800_fpu32_eabi.lib : boot28.asm.obj (.text)
                      000827d9    00000016     driverlib.lib : sysctl.obj (.text:DCC_disableDoneSignal)
                      000827ef    00000016                   : interrupt.obj (.text:Interrupt_defaultHandler)
                      00082805    00000015                   : sysctl.obj (.text:DCC_clearDoneFlag)
                      0008281a    00000015                   : sysctl.obj (.text:DCC_clearErrorFlag)
                      0008282f    00000015                   : sysctl.obj (.text:DCC_disableErrorSignal)
                      00082844    00000015                   : sysctl.obj (.text:DCC_isBaseValid)
                      00082859    00000015     device.obj (.text:GPIO_unlockPortConfig)
                      0008286e    00000014     driverlib.lib : sysctl.obj (.text:DCC_disableModule)
                      00082882    00000014                   : sysctl.obj (.text:DCC_enableModule)
                      00082896    00000010     device.obj (.text:Device_initGPIO)
                      000828a6    00000010     driverlib.lib : flash.obj (.text:Flash_isCtrlBaseValid)
                      000828b6    00000010                   : flash.obj (.text:Flash_isECCBaseValid)
                      000828c6    0000000f     empty_sysconfig_main.obj (.text:main)
                      000828d5    0000000d     driverlib.lib : interrupt.obj (.text:Interrupt_disableGlobal)
                      000828e2    0000000d     device.obj (.text:SysCtl_setLowSpeedClock)
                      000828ef    0000000c     rts2800_fpu32_eabi.lib : args_main.c.obj (.text)
                      000828fb    0000000b     device.obj (.text:SysCtl_disableWatchdog)
                      00082906    0000000b     driverlib.lib : sysctl.obj (.text:SysCtl_isMCDClockFailureDetected)
                      00082911    0000000a                   : interrupt.obj (.text:Interrupt_illegalOperationHandler)
                      0008291b    0000000a                   : interrupt.obj (.text:Interrupt_nmiHandler)
                      00082925    00000009     rts2800_fpu32_eabi.lib : _lock.c.obj (.text)
                      0008292e    00000008                            : copy_decompress_none.c.obj (.text:decompress:none)
                      00082936    00000008     f28003x_codestartbranch.obj (.text)
                      0008293e    00000007     device.obj (.text:ASysCtl_lockVREG)
                      00082945    00000007     driverlib.lib : sysctl.obj (.text:SysCtl_resetMCD)
                      0008294c    00000007     device.obj (.text:__error__)
                      00082953    00000005     board.obj (.text:Board_init)
                      00082958    00000002     rts2800_fpu32_eabi.lib : pre_init.c.obj (.text)
                      0008295a    00000001     c2000ware_libraries.obj (.text:C2000Ware_libraries_init)
                      0008295b    00000001     board.obj (.text:PinMux_init)
                      0008295c    00000001     rts2800_fpu32_eabi.lib : startup.c.obj (.text)
    
    MODULE SUMMARY
    
           Module                        code   ro data   rw data
           ------                        ----   -------   -------
        .\
           empty_sysconfig_main.obj      15     0         0      
        +--+-----------------------------+------+---------+---------+
           Total:                        15     0         0      
                                                                 
        .\device\
           device.obj                    385    83        0      
           f28003x_codestartbranch.obj   10     0         0      
        +--+-----------------------------+------+---------+---------+
           Total:                        395    83        0      
                                                                 
        .\syscfg\
           board.obj                     6      0         0      
           c2000ware_libraries.obj       1      0         0      
        +--+-----------------------------+------+---------+---------+
           Total:                        7      0         0      
                                                                 
        C:/TI/C2000Ware_6_00_00_00/driverlib/f28003x/driverlib/ccs/Debug/driverlib.lib
           sysctl.obj                    1356   154       0      
           flash.obj                     628    155       0      
           gpio.obj                      106    152       0      
           interrupt.obj                 146    0         0      
        +--+-----------------------------+------+---------+---------+
           Total:                        2236   461       0      
                                                                 
        C:\TI\CCS\CCS_20_1\ccs\tools\compiler\ti-cgt-c2000_22.6.2.LTS\lib\rts2800_fpu32_eabi.lib
           fs_div28.asm.obj              136    0         0      
           exit.c.obj                    41     0         6      
           copy_decompress_lzss.c.obj    46     0         0      
           autoinit.c.obj                43     0         0      
           memcpy.c.obj                  29     0         0      
           boot28.asm.obj                23     0         0      
           _lock.c.obj                   9      0         4      
           args_main.c.obj               12     0         0      
           copy_decompress_none.c.obj    8      0         0      
           pre_init.c.obj                2      0         0      
           startup.c.obj                 1      0         0      
        +--+-----------------------------+------+---------+---------+
           Total:                        350    0         10     
                                                                 
           Stack:                        0      0         512    
           Linker Generated:             0      17        0      
        +--+-----------------------------+------+---------+---------+
           Grand Total:                  3003   561       522    
    
    
    LINKER GENERATED COPY TABLES
    
    __TI_cinit_table @ 0008113e records: 1, size/record: 4, table size: 4
    	.data: load addr=00081130, load size=00000009 bytes, run addr=0000a800, run size=0000000a bytes, compression=lzss
    
    
    LINKER GENERATED HANDLER TABLE
    
    __TI_handler_table @ 0008113a records: 2, size/record: 2, table size: 4
    	index: 0, handler: __TI_decompress_lzss
    	index: 1, handler: __TI_decompress_none
    
    
    GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
    
    address     data page           name
    --------    ----------------    ----
    00000400      10 (00000400)     __stack
    
    0000a800     2a0 (0000a800)     __TI_enable_exit_profile_output
    0000a802     2a0 (0000a800)     __TI_cleanup_ptr
    0000a804     2a0 (0000a800)     __TI_dtors_ptr
    0000a806     2a0 (0000a800)     _lock
    0000a808     2a0 (0000a800)     _unlock
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    page  address   name                             
    ----  -------   ----                             
    0     00082953  Board_init                       
    0     00082678  C$$EXIT                          
    0     0008295a  C2000Ware_libraries_init         
    0     00082221  Device_enableAllPeripherals      
    0     000824b9  Device_init                      
    0     00082896  Device_initGPIO                  
    0     00008000  Flash_initModule                 
    0     000823ea  GPIO_setAnalogMode               
    0     000827ef  Interrupt_defaultHandler         
    0     00082911  Interrupt_illegalOperationHandler
    0     000825e2  Interrupt_initModule             
    0     00082726  Interrupt_initVectorTable        
    0     0008291b  Interrupt_nmiHandler             
    0     0008295b  PinMux_init                      
    0     0008112e  RamfuncsLoadEnd                  
    abs   0000012e  RamfuncsLoadSize                 
    0     00081000  RamfuncsLoadStart                
    0     0000812e  RamfuncsRunEnd                   
    abs   0000012e  RamfuncsRunSize                  
    0     00008000  RamfuncsRunStart                 
    0     0000812a  SysCtl_delay                     
    0     00082454  SysCtl_getClock                  
    0     00082761  SysCtl_getLowSpeedClock          
    0     00082123  SysCtl_isPLLValid                
    0     0008250a  SysCtl_selectOscSource           
    0     00082557  SysCtl_selectXTAL                
    0     000826a1  SysCtl_selectXTALSingleEnded     
    0     00082000  SysCtl_setClock                  
    0     0008113e  __TI_CINIT_Base                  
    0     00081142  __TI_CINIT_Limit                 
    0     00081142  __TI_CINIT_Warm                  
    0     0008113a  __TI_Handler_Table_Base          
    0     0008113e  __TI_Handler_Table_Limit         
    0     00000600  __TI_STACK_END                   
    abs   00000200  __TI_STACK_SIZE                  
    0     0008264d  __TI_auto_init_nobinit_nopinit   
    0     0000a802  __TI_cleanup_ptr                 
    0     0008261f  __TI_decompress_lzss             
    0     0008292e  __TI_decompress_none             
    0     0000a804  __TI_dtors_ptr                   
    0     0000a800  __TI_enable_exit_profile_output  
    abs   ffffffff  __TI_pprof_out_hndl              
    abs   ffffffff  __TI_prof_data_size              
    abs   ffffffff  __TI_prof_data_start             
    0     000822ef  __c28xabi_divf                   
    n/a   UNDEFED   __c_args__                       
    0     0008294c  __error__                        
    0     00000400  __stack                          
    0     000828ef  _args_main                       
    0     000827c2  _c_int00                         
    0     0000a806  _lock                            
    0     0008292d  _nop                             
    0     00082929  _register_lock                   
    0     00082925  _register_unlock                 
    0     0008295c  _system_post_cinit               
    0     00082958  _system_pre_init                 
    0     0000a808  _unlock                          
    0     00082678  abort                            
    0     00080000  code_start                       
    0     0008267a  exit                             
    0     000828c6  main                             
    0     00082744  memcpy                           
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    page  address   name                             
    ----  -------   ----                             
    0     00000400  __stack                          
    0     00000600  __TI_STACK_END                   
    0     00008000  Flash_initModule                 
    0     00008000  RamfuncsRunStart                 
    0     0000812a  SysCtl_delay                     
    0     0000812e  RamfuncsRunEnd                   
    0     0000a800  __TI_enable_exit_profile_output  
    0     0000a802  __TI_cleanup_ptr                 
    0     0000a804  __TI_dtors_ptr                   
    0     0000a806  _lock                            
    0     0000a808  _unlock                          
    0     00080000  code_start                       
    0     00081000  RamfuncsLoadStart                
    0     0008112e  RamfuncsLoadEnd                  
    0     0008113a  __TI_Handler_Table_Base          
    0     0008113e  __TI_CINIT_Base                  
    0     0008113e  __TI_Handler_Table_Limit         
    0     00081142  __TI_CINIT_Limit                 
    0     00081142  __TI_CINIT_Warm                  
    0     00082000  SysCtl_setClock                  
    0     00082123  SysCtl_isPLLValid                
    0     00082221  Device_enableAllPeripherals      
    0     000822ef  __c28xabi_divf                   
    0     000823ea  GPIO_setAnalogMode               
    0     00082454  SysCtl_getClock                  
    0     000824b9  Device_init                      
    0     0008250a  SysCtl_selectOscSource           
    0     00082557  SysCtl_selectXTAL                
    0     000825e2  Interrupt_initModule             
    0     0008261f  __TI_decompress_lzss             
    0     0008264d  __TI_auto_init_nobinit_nopinit   
    0     00082678  C$$EXIT                          
    0     00082678  abort                            
    0     0008267a  exit                             
    0     000826a1  SysCtl_selectXTALSingleEnded     
    0     00082726  Interrupt_initVectorTable        
    0     00082744  memcpy                           
    0     00082761  SysCtl_getLowSpeedClock          
    0     000827c2  _c_int00                         
    0     000827ef  Interrupt_defaultHandler         
    0     00082896  Device_initGPIO                  
    0     000828c6  main                             
    0     000828ef  _args_main                       
    0     00082911  Interrupt_illegalOperationHandler
    0     0008291b  Interrupt_nmiHandler             
    0     00082925  _register_unlock                 
    0     00082929  _register_lock                   
    0     0008292d  _nop                             
    0     0008292e  __TI_decompress_none             
    0     0008294c  __error__                        
    0     00082953  Board_init                       
    0     00082958  _system_pre_init                 
    0     0008295a  C2000Ware_libraries_init         
    0     0008295b  PinMux_init                      
    0     0008295c  _system_post_cinit               
    abs   0000012e  RamfuncsLoadSize                 
    abs   0000012e  RamfuncsRunSize                  
    abs   00000200  __TI_STACK_SIZE                  
    abs   ffffffff  __TI_pprof_out_hndl              
    abs   ffffffff  __TI_prof_data_size              
    abs   ffffffff  __TI_prof_data_start             
    n/a   UNDEFED   __c_args__                       
    
    [62 symbols]
    

    Best regards,

    Adrien

  • Where can I find the debugger memory map, please ? I am not sure what you are refering to.

    Please see: https://software-dl.ti.com/ccs/esd/documents/users_guide_ccs/ccs_debug-main.html#memory-map-view

  • Hi Ki,

    The document says "When connected to a target, you can view the memory map in Code Composer Studio". However, I can't connect to the target in debug mode, since it stops before, at the program loading stage.

    Best regards,

    Adrien

  • However, I can't connect to the target in debug mode, since it stops before, at the program loading stage.

    You can do a "manual launch" to launch a debug session and connect to the target without loading a program:

    https://software-dl.ti.com/ccs/esd/documents/users_guide_ccs/ccs_debug-main.html#manual-launch

  • Hi Ki,

    I have tried to follow the procedure for projectless debug. I started the project-less debug, connected the target. The memory map showed ... not much. Then I tried to load the code, and again, it failed.

    On top of my colleagues that will soon be stuck, my client has announced he will be visiting next week to run some tests in our lab. I really need to get this issue sorted.

    Thanks in advance for your help,

    Best regards,

    Adrien

  • It looks like the memory map is not enabled (everything set to RAM) so the debugger itself is not blocking access.

    Are you using the f280033.gel startup file? Regardless, for both the f280033.gel and f280039.gel have flash bank 0 at 0x80000. The failure is saying that you loaded the program and the program is expecting 0x48 to be written to 0x80000 during the verification step but it did not see that value.

    I tried loading the same example from C2000Ware. Using a similar environment but using an F280039C, I did set my target configuration for F28033 however. In any case the program load/flash was successful and you can see that 0x48 was eventually written to address 0x8000 (note that both "Program" and "Data" page map to the same memory location). Do you not see this happen when you load the program?

  • Hi Adrien and Ki,

    I was able to try this on an 80pin F280033 part today. I too see the same verification error. I changed the target configuration to F280033, the project is also using the f280033.gel file, and I modified the cmd file to remove all of the flash banks that the F280033 variant does not have access to (as it has less flash than the F280039 and other variants). However, I still see the issue. I need to debug this further. Will provide an update tomorrow.

    Best Regards,

    Marlyn

  • Hi Ki and Marlyn,

    Here is a recording of what I am doing. Maybe there is something wrong ? If so, I can't see it.

    it is using teh f280033.gel file. I have tried to change the path for the gel file in the ccxml, to use an absolute path (just in case the relative path had an issue), but the result is the same.

    Does that help ?

    Best regards,

    Adrien

  • I was able to try this on an 80pin F280033 part today. I too see the same verification error.

    Thank for trying this! The closest device I had was the F280039C controlcard which seems to be ok. 

    Adrien - I will defer to Marlyn here. I don't have the device expertise (or the device itself) to investigate further.

  • Hi Adrien,

    Can you please replace the content in the flash cmd file to the version below?

    MEMORY
    {
       //BEGIN            : origin = 0x00080000, length = 0x00000002
       BEGIN : origin = 0x088000, length = 0x000002
       BOOT_RSVD        : origin = 0x00000002, length = 0x00000126
    
       RAMM0            : origin = 0x00000128, length = 0x000002D8
       RAMM1            : origin = 0x00000400, length = 0x000003F8
       // RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMLS0           : origin = 0x00008000, length = 0x00000800
       RAMLS1           : origin = 0x00008800, length = 0x00000800
       RAMLS2           : origin = 0x00009000, length = 0x00000800
       RAMLS3           : origin = 0x00009800, length = 0x00000800
       RAMLS4           : origin = 0x0000A000, length = 0x00000800
       RAMLS5           : origin = 0x0000A800, length = 0x00000800
       RAMLS6           : origin = 0x0000B000, length = 0x00000800
       RAMLS7           : origin = 0x0000B800, length = 0x00000800
    
       RAMGS0           : origin = 0x0000C000, length = 0x00001000
       RAMGS1           : origin = 0x0000D000, length = 0x00001000
       RAMGS2           : origin = 0x0000E000, length = 0x00001000
       RAMGS3           : origin = 0x0000F000, length = 0x00000FF8
       // RAMGS3_RSVD      : origin = 0x0000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       BOOTROM          : origin = 0x003F8000, length = 0x00007FC0
       SECURE_ROM       : origin = 0x003F2000, length = 0x00006000
    
       RESET            : origin = 0x003FFFC0, length = 0x00000002
    
       /* Flash sectors */
       /* BANK 0 */
       //FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE
       //FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000
       //FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000
       //FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000
       //FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000
       //FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000
       //FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000
       //FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000
       
       
       //FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000
       FLASH_BANK0_SEC8 : origin = 0x088002, length = 0x000FFE
       FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000
       FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000
       FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000
       FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000
       FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000
       FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000
       FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000
    
       /* BANK 1 */
       FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000
       FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000
       FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000
       FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000
       FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000
       FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000
       FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000
       FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000
       //FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000
       //FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000
       //FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000
       //FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000
       //FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000
       //FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000
       //FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000
       //FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000
    
      /* BANK 2 */
       //FLASH_BANK2_SEC0  : origin = 0x0A0000, length = 0x001000
       //FLASH_BANK2_SEC1  : origin = 0x0A1000, length = 0x001000
       //FLASH_BANK2_SEC2  : origin = 0x0A2000, length = 0x001000
       //FLASH_BANK2_SEC3  : origin = 0x0A3000, length = 0x001000
       //FLASH_BANK2_SEC4  : origin = 0x0A4000, length = 0x001000
       //FLASH_BANK2_SEC5  : origin = 0x0A5000, length = 0x001000
       //FLASH_BANK2_SEC6  : origin = 0x0A6000, length = 0x001000
       //FLASH_BANK2_SEC7  : origin = 0x0A7000, length = 0x001000
       //FLASH_BANK2_SEC8  : origin = 0x0A8000, length = 0x001000
       //FLASH_BANK2_SEC9  : origin = 0x0A9000, length = 0x001000
       //FLASH_BANK2_SEC10 : origin = 0x0AA000, length = 0x001000
       //FLASH_BANK2_SEC11 : origin = 0x0AB000, length = 0x001000
       //FLASH_BANK2_SEC12 : origin = 0x0AC000, length = 0x001000
       //FLASH_BANK2_SEC13 : origin = 0x0AD000, length = 0x001000
       //FLASH_BANK2_SEC14 : origin = 0x0AE000, length = 0x001000
       //FLASH_BANK2_SEC15 : origin = 0x0AF000, length = 0x000FF0
    
    // FLASH_BANK0_SEC15_RSVD     : origin = 0x0AFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN, ALIGN(8)
       .text            : >> FLASH_BANK1_SEC2 | FLASH_BANK1_SEC3 | FLASH_BANK1_SEC4,   ALIGN(8)
       .cinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
       .switch          : > FLASH_BANK1_SEC1,  ALIGN(8)
       .reset           : > RESET,                  TYPE = DSECT /* not used, */
    
       .stack           : > RAMM1
    
    #if defined(__TI_EABI__)
       .init_array      : > FLASH_BANK1_SEC1,  ALIGN(8)
       .bss             : > RAMLS5
       .bss:output      : > RAMLS3
       .bss:cio         : > RAMLS0
       .data            : > RAMLS5
       .sysmem          : > RAMLS5
       .const           : > FLASH_BANK1_SEC4,  ALIGN(8)
    #else
       .pinit           : > FLASH_BANK1_SEC1,  ALIGN(8)
       .ebss            : > RAMLS5
       .esysmem         : > RAMLS5
       .cio             : > RAMLS0
       .econst          : > FLASH_BANK1_SEC4,  ALIGN(8)
    #endif
    
        ramgs0 : > RAMGS0
        ramgs1 : > RAMGS0
    
        /*  Allocate IQ math areas: */
       IQmath           : > FLASH_BANK1_SEC1, ALIGN(8)
       IQmathTables     : > FLASH_BANK1_SEC2, ALIGN(8)
    
       .TI.ramfunc      : LOAD = FLASH_BANK1_SEC1,
                          RUN = RAMLS0,
                          LOAD_START(RamfuncsLoadStart),
                          LOAD_SIZE(RamfuncsLoadSize),
                          LOAD_END(RamfuncsLoadEnd),
                          RUN_START(RamfuncsRunStart),
                          RUN_SIZE(RamfuncsRunSize),
                          RUN_END(RamfuncsRunEnd),
                          ALIGN(8)
    
    }
    

    Best Regards,

    Marlyn

  • Hi Marlyn,

    Thanks a lot !

    I have been able to load the code without issue with this new cmd file. I haven't checked whether the code "survives" a microcontroller restart, but I see no reason why it wouldn'd.

    Just out of curiosity, can you give me a little bit of explanation on what you did in this cmd file ?

    Thanks a lot for your help !

    Best regards,

    Adrien

  • Hi Adrien,

    Great, I am glad that worked for you. 

    The F280033x variant has less memory than the other F28003x variants so I commented out any Flash Banks that this device did not have (for example Bank 0 Sectors 0-7). You can see a full outline of the memory configuration within the 'Flash memory Map' section of the datasheet.

    I also changed the BEGIN address from 0x00080000 to 0x088000, as F280033 does not have Bank 0 sector 0 access, it starts only at Bank 0 sector 8.

    Lastly, I modified the memory region allocation in the SECTIONS portion of the cmd file. Most locations that were pointing to Flash were pointing to sectors in Bank 0 which F280033 does not have. I changed everything from Flash Bank 0 to Flash Bank 1 since F280033 has Bank 1 Sectors 0-7. However, you can change this to any bank and sector that the F280033 device has. 

    I hope that explains all of the changes. Please let me know if you face any other issues. Best of luck with your development!

    Best Regards,

    Marlyn