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TMS320F280025: how to understand the meaning for SPI HS-MODE

Part Number: TMS320F280025

Tool/software:

customer report the F280025 SPI can run ok on Normal Mode, but run fail on HS-MODE.

we check the datasheet has difference spec value, however we cannot see the difference waveform between Normal mode and HS-mode, may we understand what is meaning and requirement for spec? 

CLK and SOMI in Normal mode

CLK and SOMI in HS mode

  • Hi Terry,

    Can you clarify when you say the run failed? Are you referring to the scope shot or the data transmission failing?

    Are you enabling the SPI HS Mode bit in SW? This is necessary to meet the different timing requirements between the two modes. What are the clock speeds being used in both of these modes? 

    Best Regards,

    Aishwarya

  • Customer use F280025 to read external memory chip by SPI, what I say run fail in HS mode means F280025 cannot read the correct data from external memory chip.

    Both Normal mode and HS mode is running on 400Kbps clock, and difference just disable or enable HS mode bit in SW. We capture the waveform and do not see much difference.  

    We want to understand what is the detail meaning for datasheet spec timing requirement? could you help advice that?

  • Terry,

    Could you please provide the exact timing of the setup and hold time of the above scope shots? I am thinking its one of the following:

    (1) Could you please check if the external memory chip's output timing characteristics are compatible with the F28002x HS-Mode controller requirements.

    (2) We could not be seeing much difference in the waveforms because the oscilloscope might not precisely be showing the difference between the two. 

    (3) What is the bus capacitance of the SPI? It should be 5pF as mentioned in the datasheet. 

    Best Regards,

    Aishwarya

  • Terry,

    Checking in to see if you have been able to resolve the issue and if you have any other questions.

    Best Regards,

    Aishwarya