This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F29H850TU: Register Software Reset

Part Number: F29H850TU

Tool/software:

Hello TI Experts,

Please provide me with some clarifications regarding SysCtl_resetPeripheral():

  1. Will all register bits of that peripheral be reset independent of their reset type (e.g., SYSRSn, XRSn, PORESETn)?
  2. Can this call be made with the peripheral clock disabled?
  3. Does this call have an impact on the enabling/disabling of the peripheral clock?
  4. Where can I find the duration of the delay that must be applied before accessing the registers after this call?

Thanks in advance and kind regards,

Beat

  • Hi Beat,

    Please see answers below, let me know if you are wondering about any specific peripherals:

    Will all register bits of that peripheral be reset independent of their reset type (e.g., SYSRSn, XRSn, PORESETn)?

    When this function is called to set the respective SOFTPRES register fields, the peripheral register fields are reset no matter what their reset type is. Otherwise, the module reset is determined by the normal device reset structure.

    Can this call be made with the peripheral clock disabled?

    The peripheral clock should be enabled aka peripheral should be turned on when calling the reset function. 

    Does this call have an impact on the enabling/disabling of the peripheral clock?

    The SOFTPRES should not enable/disable the peripheral clock, just any peripheral clock related configurations within the peripheral specific registers.

    Where can I find the duration of the delay that must be applied before accessing the registers after this call?

    Within the SysCtl_resetPeripheral() function, the bit is set to both 1 (resetting the peripheral register bits) and then 0 (back to normal reset structure). No delay should be needed after calling the function.

    Best Regards,

    Aishwarya

  • Hello Aishwarya,

    Thank you very much for your response.

    Regarding question 4, I would like to know if the "XX" and "YY" delays in the example below are needed, and if so, how to determine the appropriate delay times.

    Kind regards,

    Beat

    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
    SysCtl_delay(XX)
    SysCtl_resetPeripheral(SYSCTL_PERIPH_RES_EPWM1);
    SysCtl_delay(YY)
    // first EPWM1 register access here

  • Beat,

    I appended my original answer as well, but there should be no delay needed. For the specific case mentioned, I would assume that the reset is not actually occurring right after enabling the peripheral but sometime during the application, which is also fine. 

    Best Regards,

    Aishwarya

  • Hello Aishwarya,

    OK. So I can assume that this TI code (from "f29h85x-sdk_1_01_00_00") would not really require such a 20 cycle delay?

    Thanks,

    Beat

    uint32_t uartBootInit(uint32_t bootMode)
    {
        uint32_t status = BROM_STATUS_OK;
    
        //
        // Enable Sysclk and wait for 20U cycles
        //
        SysCtl_resetPeripheral(SYSCTL_PERIPH_RES_UART_A);
        CPU_BROM_delay_cycles(20U);

  • Beat,

    Yes, that's correct. Could you reinstall the SDK as it looks like you are using an older version of it? The example was actually renamed to be the following and the delays were removed.

    Best Regards,

    Aishwarya

  • Hello Aishwarya,

    This code snippet was taken from the "uart_flash_kernel," which is still in my copy of SDK 1.01.

    But all is clear and confirmed now.

    Thank you again, Beat

  • Beat,

    Thanks for confirming. We are talking about two similar examples. If the original response answered your question, please mark it as resolved for future reference as well.

    Best Regards,

    Aishwarya