Part Number: TMS320F28379D
Tool/software:
Hello Team,
I am using TMS320F28379D microcontroller. I am using a pair of Docking Station + Control Card. I have used an example code of FreeRTOS to develop my project. I have created a couple of tasks that uses I2C and SPI, GPIOs etc. and they are running properly as expected. As a next step, I am required to interface the CLA alongwith Timer0. The Timer0 will give an interrupt every second and the CLA is configured to this source of interrupt. There is only one CLA task. Whenever the interrupt comes, the CLA will send a burst of 16 pulses along with data on a GPIO bank (GPIO48 to GPIO55 are 8bit data and GPIO56, and GPIO57 are two clocks, close to 3MHz). The problem I am facing is once I config the CLA and MEMCFG (which Automatically comes in the SYSCFG tool when CLA is added), all the other tasks stop working. The GPIO which is supposed to be toggled by the CLA isn't working either. When I debugged, I saw it is resulting in a trap. I took reference from an example CLA code and configured it as per that example. Also, I modified the linker script. I added a file "dac_cla.cla" in the the 'Application' folder that contains the main.c file. The "dac_cla.cla" file contains the function that toggles the GPIO bank.
__interrupt void Cla1Task1 ( void )
{
HWREG(GPIODATB_BASE) |= 0xFC00FFFF;
uint8_t index = 1;
uint32_t regVal = 0x0;
while(index <= 16)
{
regVal = index << 16;
HWREG(GPIODATB_BASE) = regVal;
HWREG(GPIOTGLB_BASE) = 0x3000000;
HWREG(GPIOTGLB_BASE) = 0x3000000;
index++;
}
I am sure I missed configuring something or configured something. Can you help me get some clue about this? I attached a couple of screenshots and the linker file (extension changed to .txt for uploading).
CLA config
MEMCFG
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000123, length = 0x0002DD
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
/* BANK 0 */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
/* BANK 1 */
FLASHO : origin = 0x0C0000, length = 0x002000 /* on-chip Flash */
FLASHP : origin = 0x0C2000, length = 0x002000 /* on-chip Flash */
FLASHQ : origin = 0x0C4000, length = 0x002000 /* on-chip Flash */
FLASHR : origin = 0x0C6000, length = 0x002000 /* on-chip Flash */
FLASHS : origin = 0x0C8000, length = 0x008000 /* on-chip Flash */
FLASHT : origin = 0x0D0000, length = 0x008000 /* on-chip Flash */
FLASHU : origin = 0x0D8000, length = 0x008000 /* on-chip Flash */
FLASHV : origin = 0x0E0000, length = 0x008000 /* on-chip Flash */
FLASHW : origin = 0x0E8000, length = 0x008000 /* on-chip Flash */
FLASHX : origin = 0x0F0000, length = 0x008000 /* on-chip Flash */
FLASHY : origin = 0x0F8000, length = 0x002000 /* on-chip Flash */
FLASHZ : origin = 0x0FA000, length = 0x002000 /* on-chip Flash */
FLASHAA : origin = 0x0FC000, length = 0x002000 /* on-chip Flash */
FLASHBB : origin = 0x0FE000, length = 0x001FF0 /* on-chip Flash */
// FLASHBB_RSVD : origin = 0x0FFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x016000, length = 0x001FF8
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x000FF8
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB PAGE = 0, ALIGN(8)
.pinit : > FLASHB, PAGE = 0, ALIGN(8)
.text : >> FLASHC | FLASHD | FLASHE | FLASHF PAGE = 0, ALIGN(8)
codestart : > BEGIN PAGE = 0, ALIGN(8)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
/* IMPORTANT: The FreeRTOS statically allocated stack should be allocated to this section only */
.freertosStaticStack : >> RAMM0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3, PAGE=0
/* IMPORTANT: The FreeRTOS heap should be allocated to this section only as the C28x stack
memory can be allocated in the lower 64k RAM memory only. */
.freertosHeap : > RAMGS0 | RAMGS1 , PAGE=1
#if defined(__TI_EABI__)
.init_array : > FLASHB, PAGE = 0, ALIGN(8)
.bss : > RAMLS5, PAGE = 1
.bss:output : > RAMLS3, PAGE = 0
.bss:cio : > RAMLS5, PAGE = 1
.data : > RAMLS5, PAGE = 1
.sysmem : > RAMLS5, PAGE = 1
/* Initalized sections go in Flash */
.const : > FLASHF, PAGE = 0, ALIGN(8)
#else
.pinit : > FLASHB, PAGE = 0, ALIGN(8)
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
.cio : > RAMLS5, PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF PAGE = 0, ALIGN(8)
#endif
/* Initalized sections go in Flash */
.switch : > FLASHB PAGE = 0, ALIGN(8)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
/* CLA specific sections */
#if defined(__TI_EABI__)
Cla1Prog : LOAD = FLASHG,
RUN = RAMLS0,
LOAD_START(Cla1funcsLoadStart),
LOAD_END(Cla1funcsLoadEnd),
RUN_START(Cla1funcsRunStart),
LOAD_SIZE(Cla1funcsLoadSize),
PAGE = 0, ALIGN(8)
#else
Cla1Prog : LOAD = FLASHG,
RUN = RAMLS0,
LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
RUN_START(_Cla1funcsRunStart),
LOAD_SIZE(_Cla1funcsLoadSize),
PAGE = 0, ALIGN(8)
#endif
CLADataLS1 : > RAMLS1, PAGE=0
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
#if defined(__TI_EABI__)
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#else
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#else
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#endif
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
/* The following section definitions are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS1, PAGE = 0
.scratchpad : > RAMLS1, PAGE = 0
.bss_cla : > RAMLS1, PAGE = 0
#if defined(__TI_EABI__)
.const_cla : LOAD = FLASHB,
RUN = RAMLS1,
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize),
PAGE = 0,
ALIGN(4)
#else
.const_cla : LOAD = FLASHB,
RUN = RAMLS1,
RUN_START(_Cla1ConstRunStart),
LOAD_START(_Cla1ConstLoadStart),
LOAD_SIZE(_Cla1ConstLoadSize),
PAGE = 0,
ALIGN(4)
#endif
#endif //CLA_C
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
