Tool/software:
Hello,
I’m working with the TMS320F280039C LaunchPad and using the ADC module based on the adc_ex2_soc_epwm example. In my setup:
ADC SOC0 is triggered by ePWM1 ADCSOCA at counter = zero (Up-count mode).
Once the ADC conversion completes, an interrupt is generated (Occurs at the end of the acquisition window).
ePWM1 is configured for 100 kHz in Up-count mode.
I’m recording the ePWM counter value at the time of interrupt and consistently observe values between 90 to 93.
Given the SYSCLK = 120 MHz, each ePWM tick is 8.33 ns, so the interrupt occurs approximately 750 ns (=90 * 8.33ns) after the trigger.
I understand the ADC timing as follows:
ADCCLK = 60 MHz, Prescaler = 2
ADC Conversion Time =(9 * (1/120E6)) + (11 * (1/60E6)) = 258.3E-9 seconds
However, I’m seeing a delay of around 750 ns, which is significantly longer than the calculated 258 ns. That leaves a gap of approximately 492 ns.
Could you help me understand what contributes to this additional delay?\
Also, here are the relevant disassembly instructions:
237 {
adcA1ISR():
008800: 761B ASP
008801: FFF0 PUSH RB
008802: 0005 PUSH AR1H:AR0H
008803: ABBD MOVL *SP++, XT
008804: A8BD MOVL *SP++, XAR4
008805: A0BD MOVL *SP++, XAR5
008806: C2BD MOVL *SP++, XAR6
008807: C3BD MOVL *SP++, XAR7
008808: E20000BD MOV32 *SP++, STF
00880a: E20300BD MOV32 *SP++, R0H
00880c: E20301BD MOV32 *SP++, R1H
00880e: E20302BD MOV32 *SP++, R2H
008810: E20303BD MOV32 *SP++, R3H
008812: E6300600 SETFLG RNDF32=1,RNDF64=1
008814: FF69 SPM #0
008815: 2942 CLRC OVM|PAGE0
008816: 5616 CLRC AMODE
239 isrTick_Entry = EPWM_getTimeBaseCounterValue(myEPWM0_BASE);
008817: FF204000 MOV ACC, #16384
008819: 764092F1 LCR EPWM_getTimeBaseCounterValue
00881b: 761F02A0 MOVW DP, #0x2a0
00881d: 9609 MOV @0x9, AL
243 GPIO_togglePin(myGPIO0);
00881e: 0216 MOVB ACC, #22
00881f: 76408E69 LCR GPIO_togglePin
Thanks & Regards,
Prathamesh.
