Part Number: TMS320F280049C-Q1
Tool/software:
Hi experts,
My customer wants to know the actual action in below configuration:
EPWM1 TBCTR=0 will trigger ISR, and in ISR, it set the EPWM AQCTLA.ZRO = 10, that means force the output high in TBCTR=0; and they also enable the global load mode of AQCTLA, and the Load Strobe event will happen at TBCTR=0. Because in TBCTR=0 it exists a lot of operation: trigger ISR, trigger Global load, AQ event, so customer have confuse about the Time sequence, it have below assumption:
1. In the first PWM cycle, ISR generate and load the EPWM AQCTLA.ZRO value to shadow register, and EPWM AQCTLA.ZRO = 10 update to active register in second PWM cycle, and EPWM AQCTLA.ZRO = 10 takes effect in third cycle;
2. In the first PWM cycle, ISR generate and load the EPWM AQCTLA.ZRO value to shadow register, and EPWM AQCTLA.ZRO = 10 update to active register in second PWM cycle, and EPWM AQCTLA.ZRO = 10 takes effect immediately.
In order to check the Time sequence of above situation, I make the demo to check in how much PWM cycle between ISR and the EPWM AQCTLA.ZRO = 10 taking effect. the demo can be download from: epwm_ex13_up_aq.zip
And in the test, it seems In the first PWM cycle, ISR generate and load the EPWM AQCTLA.ZRO value to shadow register, and EPWM AQCTLA.ZRO = 10 update to active register in second PWM cycle, and EPWM AQCTLA.ZRO = 10 takes effect immediately.
1. Could you help to check if it is correct?
2. In our TRM, it seems below situation is familiar with the customer's situation (it loads the CMPA=0 when TBCTR=0), it just said it have contention. What will happen if it exists contention? The pulse will miss or others?
BRs
Shuqing
