UART (SCI-A) Communication Issue on (Pins 84/85) – No Output.

Tool/software:

Dear TI Support Team,

                                            I’m encountering an issue with UART communication using SCI-A on the TMS320F28379S micro controller.

Despite proper initialization, no data is being transmitted or received via pins 84 (SCITXDA) and 85 (SCIRXDA) in my application firmware.

Main Issue:
SCI-A is configured correctly in my firmware, and execution reaches the UART transmit function and while observing in debug window the value reaches the SCI TX register("SciaRegs.SCITXBUF.all").

However, there is no observable output on TX (pin 84) when monitored through a TTL to USB converter or oscilloscope.

But while using GPIO pin 28 and 29 with same code(only pin modified) i can send and receive data.

I've also tried using the example code provided with controlSUITE and result is same.  

The same USB-TTL adapter works fine with other boards, confirming it's functional.

Hardware Setup:
MCU: TMS320F28379S on a custom PCB
UART Interface: SCI-A
SCI-A TX (Pin 84) and RX (Pin 85) routed to a FT232 TTL-to-USB converter (3.3V logic confirmed) on board.
Baud rate: 115200
PC COM port settings: Verified – No parity, 1 stop bit

Questions:-

1. Are there any known issues with using pins 84/85 for SCI-A TX/RX in application firmware?
2. Do these pins require special handling or unlock sequences after reset?
3. Are there internal conflicts (e.g., clock configuration or pin mux issues) that could block UART output?
4. Is there a recommended method to verify SCI-A output at pin level?

I’d appreciate any documentation references or debugging suggestions. Below is my code for reference

#include "F28x_Project.h"

#define SCI_A_BAUD_RATE    115200UL
#define LSPCLK_FREQ        50000000UL  // LSPCLK is 50 MHz
#define GPIO_LED_TOGGLE    88
#define GPIO_HEARTBEAT     99

// Function Prototypes
void system_init(void);
void gpio_init(void);
void sci_init(void);
void scia_tx_char(unsigned int a);
__interrupt void sciaRxFifoIsr(void);

// Main Function
void main(void)
{
    system_init();
    gpio_init();
    sci_init();

    EALLOW;
    PieVectTable.SCIA_RX_INT = &sciaRxFifoIsr;
    EDIS;

    PieCtrlRegs.PIEIER9.bit.INTx1 = 1; // Enable SCIRXINTA in PIE group 9
    IER |= M_INT9;                    // Enable CPU INT9
    EINT;                             // Enable global interrupt INTM
    ERTM;                             // Enable real-time DBGM

    while (1)
    {
        GpioDataRegs.GPDTOGGLE.bit.GPIO99 = 1; // Heartbeat toggle
        scia_tx_char('A');      // Send 'A' as well
        DELAY_US(500000); // 0.5s delay
    }
}

// Initializes system control and interrupts
void system_init(void)
{
    InitSysCtrl();      // Clock, PLL, watchdog
    DINT;               // Disable interrupts
    InitPieCtrl();      // Default PIE setup
    IER = 0x0000;
    IFR = 0x0000;
    InitPieVectTable(); // Populate vector table
}

// GPIO Initialization for LED and SCI
void gpio_init(void)
{
    EALLOW;

    // LED Toggle Output GPIO88
    GpioCtrlRegs.GPCGMUX2.bit.GPIO88 = 0;
    GpioCtrlRegs.GPCMUX2.bit.GPIO88 = 0;
    GpioCtrlRegs.GPCDIR.bit.GPIO88 = 1;

//    GpioCtrlRegs.GPCGMUX2.bit.GPIO84 = 0;
//    GpioCtrlRegs.GPCMUX2.bit.GPIO84 = 0;
//    GpioCtrlRegs.GPCDIR.bit.GPIO84 = 1;

    // Heartbeat GPIO99
    GpioCtrlRegs.GPDGMUX1.bit.GPIO99 = 0;
    GpioCtrlRegs.GPDMUX1.bit.GPIO99 = 0;
    GpioCtrlRegs.GPDDIR.bit.GPIO99 = 1;

    // SCIA_TX = GPIO84, SCIA_RX = GPIO85
    GpioCtrlRegs.GPCGMUX2.bit.GPIO84 = 1;  // 01: SCITXDA
    GpioCtrlRegs.GPCMUX2.bit.GPIO84 = 1; // SCITXDA
    GpioCtrlRegs.GPCDIR.bit.GPIO84 = 1;

    GpioCtrlRegs.GPCGMUX2.bit.GPIO85 = 1;  // 01: SCIRXDA
    GpioCtrlRegs.GPCMUX2.bit.GPIO85 = 1; // SCIRXDA
    GpioCtrlRegs.GPCDIR.bit.GPIO85 = 0;
    GpioCtrlRegs.GPCQSEL2.bit.GPIO85 = 3; // Asynchronous

    EDIS;
}

// SCI Initialization
void sci_init(void)
{
    uint16_t brr = (LSPCLK_FREQ / (SCI_A_BAUD_RATE * 8UL)) - 1;

    // FIFO Init
    SciaRegs.SCIFFTX.all = 0xE040; // Enable FIFO, reset TX FIFO
    SciaRegs.SCIFFRX.all = 0x2061; // Enable RX FIFO, interrupt after 1 byte
//    SciaRegs.SCIFFCT.all = 0x0;
    SciaRegs.SCIFFCT.all = 0x00;

    // Communication Config
    SciaRegs.SCICCR.all = 0x07; // 1 stop bit, no parity, 8-bit char, async
    SciaRegs.SCICTL1.all = 0x0003; // Enable TX, RX
    SciaRegs.SCICTL2.all = 0x0003; // RX/TX interrupt enable

    // Baud rate
    SciaRegs.SCIHBAUD.all = (brr >> 8) & 0xFF;
    SciaRegs.SCILBAUD.all = brr & 0xFF;

    // Release from Reset
    SciaRegs.SCICTL1.all = 0x0023;
}

// Send one byte via SCI
void scia_tx_char(unsigned int a)
{
//    while (SciaRegs.SCIFFTX.bit.TXFFST == 16); // Wait for space
//    while (SciaRegs.SCIFFTX.bit.TXFFST >= 16); // Wait for space
    while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
    SciaRegs.SCITXBUF.all = a;
}

// RX Interrupt Service Routine
__interrupt void sciaRxFifoIsr(void)
{
    unsigned int rx_data;

    while (SciaRegs.SCIFFRX.bit.RXFFST == 0); // Wait for data
    rx_data = SciaRegs.SCIRXBUF.all; // Read received byte

    scia_tx_char(rx_data);  // Echo back
    scia_tx_char('A');      // Send 'A' as well
    GpioDataRegs.GPCTOGGLE.bit.GPIO88 = 1; // Toggle GPIO88 on RX

    // Clear flags
    SciaRegs.SCIFFRX.bit.RXFFOVRCLR = 1;     // Overflow
    SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1;     // Interrupt flag
    PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9; // Acknowledge interrupt group
}