TMDSCNCD28P55X: CLA task not able to trriggerd By ADC

Part Number: TMDSCNCD28P55X
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Tool/software:

Hello TI Team,

I am currently using the TMDSCNCD28P55X control card for development purposes.

I want to read the ADC result reg in CLA.

The ADCINT is not starting the task2 in CLA. Even so the initialization of Task8 is also not taking place (Feel so).

The ADCINTFLG is seen to be fixed at 1. The ADCresult registers showing values.  The code of the CLA initialization is given.

Thanks and Regards

Ram singh

    // CLA trigger source 
    AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0; // End of SOC0 will set INT1 flag
    AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;   // Enable INT1 flag
    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Make sure INT1 flag is cleared
    AdccRegs.ADCINTSEL1N2.bit.INT1CONT= 1;
    //
    // Configure memory and initialize the CLA registers
    //
    init_CLA();
    CLA_configClaMemory();
  
    
    void EscController::init_CLA()
{
    #ifdef _FLASH
    #ifndef CMDTOOL // Linker command tool is not used
    
        extern uint16_t Cla1ProgRunStart, Cla1ProgLoadStart, Cla1ProgLoadSize;
        extern uint16_t Cla1ConstRunStart, Cla1ConstLoadStart, Cla1ConstLoadSize;
    
        //
        // Copy the program and constants from FLASH to RAM before configuring
        // the CLA
        //
        memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
            (uint32_t)&Cla1ProgLoadSize);
        memcpy((uint32_t *)&Cla1ConstRunStart, (uint32_t *)&Cla1ConstLoadStart,
            (uint32_t)&Cla1ConstLoadSize );
    
    
    #endif //CMDTOOL
    #endif //_FLASH

    CLATask_init();
}


void EscController::CLA_configClaMemory()
{
    EALLOW;
    //
    // Initialize and wait for CLA1ToCPUMsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){};

    //
    // Initialize and wait for CPUToCLA1MsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){};

    //
    // CLA Program will reside in RAMLS0 and data in RAMLS1, RAMLS2
    //
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 1U;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0U;
    MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS2 = 0U;

    //
    // Select CLA as the master of RAMLS0, RAMSL1, RAMLS2
    //
    MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1U;
    MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1U;
    MemCfgRegs.LSxMSEL.bit.MSEL_LS2 = 1U;

    EDIS;   
}

void CLATask_init(){
    //
    // Configure all CLA task vectors
    // On Type-1 and Type-2 CLAs the MVECT registers accept full 16-bit task addresses as
    // opposed to offsets used on older Type-0 CLAs
    //
#pragma diag_suppress=770
    //
    // CLA Task 1
    //
    EALLOW;
    Cla1Regs.MVECT2 = (uint16_t) (&runEscInCla1Task2);
    DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK2 = 11;  //Cla runEscInCla1Task2 trrigered by ADCCINT1

    //
    // CLA Task 8
    //
    Cla1Regs.MVECT8 = (uint16_t) (&Cla1Task8);
    DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK2 = 0;  //CLA_TRIGGER_SOFTWARE

    //
    // Disable background task
    //
    Cla1Regs._MCTLBGRND.bit.BGEN = 0;
#pragma diag_warning=770
    //
    // Enable the IACK instruction to start a task on CLA in software
    // for all  8 CLA tasks. Also, globally enable all 8 tasks (or a
    // subset of tasks) by writing to their respective bits in the
    // MIER register
    //
    // Enable IACK to start tasks via software
    Cla1Regs.MCTL.bit.IACKE = 1; 
    Cla1Regs.MIER.all = (M_INT8 | M_INT2); 
    EDIS;
}