BOOSTXL-BUCKCONV: Unexpected results from SFRA on tidu986a

Part Number: BOOSTXL-BUCKCONV
Other Parts Discussed in Thread: SFRA, SYSCONFIG

Tool/software:

Hello,

I've been running the labs as per TIDU986a and had a a couple of abnormalities about SFRA:

  • Plant vs OpenLoop Model:
    • When I run Lab 1 I expect to get the D to Vo response. The sweeps done by SFRA provide two results: the open-loop transfer function and the plant transfer function. In the context of this test what does open-loop transfer function mean? Because the results from that look very strange if it is the D-to-Vo bode plot of a CCM buck. Here is a screen shot of the SFRA results from the Lab documentation for the open-loop transfer function and the phase starts off at close to -180degrees which is strange.
    • When I look at the Plant transfer function this seems more in-line with what I expect the D-to-Vo response to look like from phase perspective. However, the DC gain value seems quite low. The output voltage is about 2.3V and the duty cycle I punched in is 30%. I would expect to see a gain of ~17dB but in the plant bode plot the gain is about 1.7. Would be great if someone could help me understand the results.

  • The next thing that I ran into that was a bit strange was when I was looking to see the impact of lower ISR execution rate on my D-to-Vo transfer function. I expect the lower my controller execution frequency the faster my phase roll off would be but I am seeing something quite the opposite. Here is a comparison of the plant bode plots with execution at 200kHz and at 33kHz:

  

For 33kHz the phase roll off seems to occur at a much higher frequency which is very strange to me. Was wondering if someone could help me understand this result.

NOTE: I modified the project to get the system to run at 33kHz and just to ensure that I did it correctly I put a pin toggle in the ISR and captured it on a scope (the time scale is unchanged and the cursors indicate the ISR frequency with the pin toggle on CH1. CH2 is the output voltage). See below:

Looking forward to some clarification on the SFRA tool!

  • Hi Munadir,

    I am looking into this question at the moment. In the meantime, can you refer to our C2000Tm Software Frequency Response Analyzer (SFRA) Library and Compensation Designer User's Guide? Also, we have a few videos documenting this tool, hope that can clarify some questions you may have

    Regards,

    Peter

  • Hi Peter,

    Thanks for the suggestion. I had skimmed through the documentation for the SFRA library to try to understand what the Plant and Open-Loop models refer to but the strange results for the open loop buck kind of confused me. Specially I looked at this section: 

    My understanding for this would be that for an open loop controller buck converter the frequency analysis in the "Plant-model" and the "Open-Loop" model should be the same or the "Open-Loop" frequency response doesn't really make sense to look at since there is no compensator. 

    Anyway, I'll have a more thorough look. 

  • Hi Munadir,

    Did the documentation clear up the questions you had regarding this?


    Regards,

    Peter

  • Hi Peter, not quite. The scaling differences were still not evident as to why the DC gain would be lower than expected. However, there is probably a very simple explanation for this that one can probably figure out by digging through the code.

    What is more interesting to me and less obvious is the impact of execution frequency and phase rolloff makes no sense. Was there any insight on that?

  • Hello, 

    The expert will be out of the office until 9/2/25. 

    Regards,

    Carlos

  • Hi Munadir,

    There were slight hardware modifications on the board to facilitate better control loop performance, so the actual SFRA plots will differ slightly from the ones shown in the manual.

    Note that roll off is a characteristic that can occur in two directions, depending on the type of filter. For a low-pass filter, the roll-off happens as frequency increases. In a high-pass filter or the lower edge of a band-pass filter, the roll-off occurs as frequency decreases.

    The code features a #define for defining the ISR generation divider. Is that what is being used to generate the lower execution frequency?

    Regards,

    Peter

  • Hi Peter, I essentially modified the syscfg js file (see attached)

                    name: "IsrRatio",
                    displayName: "Control Loop ISR Ratio",
                    default: 1,
                    onChange: recalc_IsrFreq,
                    options: [
                        {displayName: "Control ISR runs at Fsw",     name: 1},
                        {displayName: "Control ISR runs at Fsw / 2", name: 2},
                        {displayName: "Control ISR runs at Fsw / 3", name: 3},
    		            {displayName: "Control ISR runs at Fsw / 6", name: 6}

    Basically the last option "{displayName: "Control ISR runs at Fsw / 6", name: 6}" is what I added. I also wanted to make sure that my changes are working as expected and so I configured a GPIO to toggle everytime the ISR is called.

    In "buck_user_setting.h" I added:

    #define BUCK_ISR_PIN_TOGGLE_GPIO        4
    #define BUCK_ISR_PIN_TOGGLE_CONFIG      GPIO_4_GPIO4

    In "buck.h" I added the toggle:

    #pragma FUNC_ALWAYS_INLINE(BUCK_runIsr)
    static inline void BUCK_runIsr(void)
    {
        //
        // Record the ePWM TBCTR value for informational purposes.
        // The value is helpful for measuring the sum of ADC ACQPS + ISR latency.
        // The value can also help to confirm that enough time has elapsed for
        //   the Vout ADC conversion to complete and arrive in ADCxRESULT
        //
        BUCK_isrEnter_ticks = EPWM_getTimeBaseCounterValue(BUCK_DRV_EPWM_BASE);
    
        GPIO_togglePin(BUCK_ISR_PIN_TOGGLE_GPIO); // Toggle GPIO to indicate ISR rate

    In "buck_hal.c" I set the direction and pin configuration:

    void BUCK_HAL_setupInterrupt(void)
    {
        // Adding handling for ISR pin toggle
        GPIO_setDirectionMode(BUCK_ISR_PIN_TOGGLE_GPIO, GPIO_DIR_MODE_OUT);
        GPIO_setPinConfig(BUCK_ISR_PIN_TOGGLE_CONFIG);

    apart from that I didn't make any changes to the project. In my original post I'm measuring GPIO4 to make sure that my ISR is executing as expected and confirmed that my modifications were working like I expected them to both when sysconfig is set to execute ISR at 200kHz and at 200kHz/6 (the setting I added).

  • Hi Munadir,

    That makes sense and it looks like your alterations work. Have you tried any other variations in the control frequency apart from 200kHz and 33kHz? Are the changes in the roll-off gradually transitioning between the 2 frequencies just in the opposite direction you are expecting?

    Regards,

    Peter

  • Hi Peter, I have not specifically tried that. Let me give it a try and will keep you posted.