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TMS320F28052: Continuation of transmission after NACK during I2C master transmission

?? ??
Prodigy 30 points
Part Number: TMS320F28052

Tool/software:

I have a question regarding the operation of the C2000 series built-in I2C module.
Currently, in I2C Master Write mode, we are sending "address + 2 bytes of data" to an LCD device.
However, when sending the address, a NACK interrupt occurs and communication stops at that point.
My requirement is to send the address + 2 bytes of data without stopping communication even if NACK occurs.

Question.
(1) Is it possible to use a hard I2C module to continue and resume data transmission without stopping communication after a NACK occurs?
(2) If this is not possible, could you please explain the reason and how to work around it?

We would greatly appreciate it if you could reply to us "today" as this is an important issue on our development schedule.
Thank you in advance.

  • 0
    TI__Genius 17181 points

    Hi,

    What is the cause of the NACK on the target side? Generally all NACKs should be handled since they represent an error in the I2C communication. Have you tried disabling the NACK interrupt in the enabled interrupts register? This may cause the communication to stall when a NACK is received and the I2C module may need to be reset

    Regards,

    Peter

  • 0 in reply to Peter Luong1
    Prodigy 30 points

    Thank you for your response.
    However, as the focus is slightly different from what I would like to know, please allow me to confirm again.

    My questions can be summarized as follows:

    (1) As a specification of the C2000 I²C hardware module, is it possible to continue sending data bytes without issuing a STOP even if a NACK is received during the address phase while the master is transmitting?
    ・ If possible, please explain the method,
    ・ If not possible, please explain why it is not possible according to the specifications.

    (2) Are there any officially recommended methods by TI for continuing transmission without stopping communication even if a NACK occurs?
    ※We would like a clear answer regarding the behavior of the hardware specifications, not the causes or countermeasures for NACK.

    We apologize for the inconvenience, but we would appreciate your response by August 26.

  • 0
    Prodigy 30 points

    Regarding our previous inquiry about the operation of the C2000 I²C hardware module, we are contacting you again.
    We requested a response by August 26th, but have yet to receive any communication.

    This information is critically important for our evaluation.
    We kindly request your prompt attention to this matter.

    Thank you for your cooperation.

  • 0 in reply to ?? ??
    TI__Genius 17181 points

    Hi,

    ?? ?? said:
    (1) As a specification of the C2000 I²C hardware module, is it possible to continue sending data bytes without issuing a STOP even if a NACK is received during the address phase while the master is transmitting?
    ・ If possible, please explain the method,
    ・ If not possible, please explain why it is not possible according to the specifications.

    Based on the I2C implementation for our C2000, it is not possible to continue sending data bytes without issuing a STOP when a NACK is received. The I2C module, when configured, is designed to automatically generate a STOP condition when a NACK is received. There are some I2C implementations on other MCUs which may feature an IGNACK bit which can be enabled to completely ignore NACKs received from the target, but that is not something available on the F2805x

    ?? ?? said:
    (2) Are there any officially recommended methods by TI for continuing transmission without stopping communication even if a NACK occurs?
    ※We would like a clear answer regarding the behavior of the hardware specifications, not the causes or countermeasures for NACK.

    There is no hardware mechanism to override this behavior. The STOP condition generation after NACK is a hardware-level implementation. Even in "Repeat Mode" or other special modes, the hardware will still generate a STOP condition upon receiving a NACK during the address phase

    Regards,

    Peter

  • 0 in reply to Peter Luong1
    Prodigy 30 points

    Thank you for your continued support.

    We sincerely appreciate your prompt attention to this matter.

    Thanks to your assistance, we have been able to understand the situation.

    We look forward to your continued cooperation.