Tool/software:
Hello,
I would like to store a couple constant float LUT arrays in LS ram memory to be accessed by the CLA. I have the LUTs initially stored in flash and then written to ram on startup and was able to get this all working correctly when the LS ram was read by the CPU. However, once I gave ram access over to the CLA and had the CLA do the reads I noticed the access time for a single read (in the cla) was several hundred clock cycles, so something seems off. The read value is the correct value so I am guessing my setup is incorrect.
Here are the relevant code sections
///// LUT C File
#pragma DATA_SECTION (LUT_D2,"LUT_DUTY_MEM1")
const float LUT_D2[16][71] = {..}
/////
///// LUT H File
extern const float LUT_D2[LUT_P_MAX+1][LUT_Vr_MAX+1];
//////
///// CLA memory config
void initCLA(void)
{
//
// Copy the program and constants from FLASH to RAM before configuring
// the CLA
//
#if defined(_FLASH)
memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize);
memcpy((uint32_t *)&Cla1ConstRunStart, (uint32_t *)&Cla1ConstLoadStart,
(uint32_t)&Cla1ConstLoadSize );
memcpy((uint32_t *)&LUTRUNSTART, (uint32_t *)&LUTRUNSTART,
(uint32_t)&LUTRUNSTART );
// memcpy(&LUTRUNSTART,&LUTRUNSTART,(Uint32)&LUTRUNSTART);
#endif //defined(_FLASH)
//
// CLA Program will reside in RAMLS0 and data in RAMLS1, RAMLS2
//
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS6, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS7, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_PROGRAM);
MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_PROGRAM);
MemCfg_setCLAMemType(MEMCFG_SECT_LS2, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS4, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS5, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS6, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS7, MEMCFG_CLA_MEM_DATA);
//
// Suppressing #770-D conversion from pointer to smaller integer
// The CLA address range is 16 bits so the addresses passed to the MVECT
// registers will be in the lower 64KW address space. Turn the warning
// back on after the MVECTs are assigned addresses
//
#pragma diag_suppress=770
//
// Assign the task vectors and set the triggers for task 1
// and 8
//
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_1, (uint16_t)&Cla1Task1);
// CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_2, (uint16_t)&Cla1Task2);
CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_8, (uint16_t)&Cla1Task8);
//CLA_setTriggerSource(CLA_TASK_1, CLA_TRIGGER_ADCA1);
// CLA_setTriggerSource(CLA_TASK_1, CLA_TRIGGER_ADCB1);
CLA_setTriggerSource(CLA_TASK_1, CLA_TRIGGER_EPWM7INT);
// CLA_setTriggerSource(CLA_TASK_2, CLA_TRIGGER_EPWM7INT);
CLA_setTriggerSource(CLA_TASK_8, CLA_TRIGGER_SOFTWARE);
#pragma diag_warning=770
//
// Enable Tasks 1 and 8
//
// CLA_enableTasks(CLA1_BASE, (CLA_TASKFLAG_1 | CLA_TASKFLAG_2| CLA_TASKFLAG_8));
CLA_enableTasks(CLA1_BASE, (CLA_TASKFLAG_1 | CLA_TASKFLAG_8));
//
// Force task 8, the one time initialization task
//
CLA_forceTasks(CLA1_BASE, CLA_TASKFLAG_8);
}
//////////////
////// Linker File
RAMLS4_7 : origin = 0x0000A000, length = 0x00002000
FLASH_BANK1_SEC567 : origin = 0x095000, length = 0x003000
LUT_MEM_RAM1 : LOAD = FLASH_BANK1_SEC567,
RUN = RAMLS4_7,
LOAD_START(LUTLOADSTART),
RUN_START(LUTRUNSTART),
LOAD_SIZE(LUTLOADSIZE)
ALIGN(8)
/////// CLA Program
#include "TPS_LUT.h"
float Lut_test;
__attribute__((interrupt)) void Cla1Task1(void)
{
// x,y two uint16_t values with correct limits
Lut_test = LUT_D2[x][y];
///////
