Tool/software:
Hi,
I use SCI with enabled tx fifo (9600 bps). Due to design requirements I cannot use interrupts nor dma.
In order to send some log message I have a function that is called multiple times in a loop.
Inside the function I check how much space is in tx fifo and fill it up to 16 characters:
while(SciRegs->SCIFFTX.bit.TXFFST < 16 && transmit_index < data_out_length)
{
SciRegs->SCITXBUF.all = data_out[transmit_index++];
}
The problem is that I observe random missing characters.
I prepared an experiment with logic analyser where:
TXD line is observed,each write to SCITXBUF is signaled on specific gpio by state change (6th green signal below),initial contents of sent buffer is printed on another serial
The correct behaviour is that:
- on first function call, when fifo is empty, there are 17 writes (I assume that there are 16 inside fifo and 1 in tx register) in one 'while' loop (~0,35 per one write to fifo),
- after each character is transmitted, 'while' loop adds only one character.
In moment of error, there is missing character that was expected on TXD.
The problem is preceded by two writes to fifo, that of course results in fifo overflow - see double write to FIFO (1st vertical green marker 2xWR) (between writes there is 17 or 32us gap).
Number of writes to fifo are controlled by TXFFST in condition of the 'while' loop.
My conclusion is that reading TXFFST can result in incorrect value.
Is there a race hazard problem in SCI hardware?
Regards,
Piotr Romaniuk
