TMS320F28377S: SPIB spurious clock pulses

Tool/software:

Hello TI Support,

I observe spurious clock pulses (glitches) on the SPIB module of my LAUNCHXL-F28377S board, while SPIA works fine with identical settings.

Setup:

• Device: TMS320F28377S, LSPCLK = 50 MHz

• Mode: 16-bit master, Mode 0, CS hardware, FIFO disabled

Observations:

• SPIA: Stable clock, no extra pulses at 1, 2, and 5 MHz

• SPIB:

  • At 5 MHz → extra pulses on both CLK and MOSI (groups of 2–4)

  • At 2 MHz → extra pulses on CLK only

  • At 1 MHz → no glitches observed

• When SPIB pins are configured as GPIO, glitches disappear. Re-enabling SPI mux brings glitches back.

• Tested with different logic analyzer channels to rule out measurement artifacts.

Additional test:

• Mapping SPIB clock to GPIO65 (SPICLKB) → glitches appear

• Mapping SPIB clock to GPIO58 (SPICLKB) → glitches disappear

• However, GPIO58 is also required for SPIA MOSI in my application, so this workaround cannot be used directly.

Attachments:

1. Logic analyzer screenshot (SPIA vs SPIB)

2. Board photo with Dupont wiring (for setup clarity)

3. Minimal test code

Could you please confirm if this is expected hardware behavior (due to pin mux routing) or a configuration issue?
Any recommended workaround would be greatly appreciated.

Thank you,
Mr. Orhan Gürbüz

#include "driverlib.h"
#include "device.h"
#include "pin_map.h"

void SPIA_init(void);
void SPIB_init(void);

int main(void)
{
    Device_init();
    Device_initGPIO();

    // === SPIA ===
    GPIO_setPinConfig(GPIO_58_SPISIMOA);
    GPIO_setPinConfig(GPIO_59_SPISOMIA);
    GPIO_setPinConfig(GPIO_60_SPICLKA);
    GPIO_setPinConfig(GPIO_61_SPISTEA);

    // === SPIB ===
    GPIO_setPinConfig(GPIO_63_SPISIMOB);
    GPIO_setPinConfig(GPIO_64_SPISOMIB);
	GPIO_setPinConfig(GPIO_65_SPICLKB); // GPIO_58_SPICLKB
    GPIO_setPinConfig(GPIO_66_SPISTEB);

    SPIA_init();
    SPIB_init();

    while(1)
    {
        SPI_writeDataNonBlocking(SPIB_BASE, 0xAAAA);
        SPI_writeDataNonBlocking(SPIA_BASE, 0x5555);
        DEVICE_DELAY_US(20);
    }
}

void SPIA_init(void)
{
    SPI_disableModule(SPIA_BASE);
    SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_MASTER, 5000000, 16);
	SPI_disableFIFO(SPIA_BASE);
    SPI_disableInterrupt(SPIA_BASE, SPI_INT_RXFF | SPI_INT_TXFF | SPI_INT_RX_OVERRUN | SPI_INT_RXFF_OVERFLOW | SPI_INT_RX_DATA_TX_EMPTY);
    SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_RXFF | SPI_INT_TXFF | SPI_INT_RX_OVERRUN | SPI_INT_RXFF_OVERFLOW | SPI_INT_RX_DATA_TX_EMPTY);
    SPI_enableModule(SPIA_BASE);
}

void SPIB_init(void)
{
    SPI_disableModule(SPIB_BASE);
    // GPIO_setPinConfig(GPIO_65_GPIO65);
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_MASTER, 5000000, 16);
	SPI_disableFIFO(SPIB_BASE);
    SPI_disableInterrupt(SPIB_BASE, SPI_INT_RXFF | SPI_INT_TXFF | SPI_INT_RX_OVERRUN | SPI_INT_RXFF_OVERFLOW | SPI_INT_RX_DATA_TX_EMPTY);
    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_RXFF | SPI_INT_TXFF | SPI_INT_RX_OVERRUN | SPI_INT_RXFF_OVERFLOW | SPI_INT_RX_DATA_TX_EMPTY);
    SPI_enableModule(SPIB_BASE);
    // GPIO_setPinConfig(GPIO_65_SPICLKB);
}