Tool/software:
Hello,
I am using TMS320F28377D-EP in my product.
In my Firmware, the ADC gets SOC from 2 sources: one is via EPWM module (PWM-synced Interrupts) and another is SW-triggered SOC (Force SOC operation). These are spread accross all the ADC modules (A, B, C, D).
The PWM triggered SOCs happen once every 50us and their ISRs last for approx 3us.
I am triggering different SOC via SW every 300ms sequentially (I don't trigger the next SOC until ISR of previous SOC is done). ISR function corresponding to the SOC gets executed. However, after certain time, I don't receive the ISR of the triggered SOC (it is not a specific SOC but any one from my sequence) and my sequence remains stuck (which means I am almost never getting the ISR of that SOC). The PWM-triggered ISRs (even those from the same module) don't stop here.
From the Errata (link / Page 12 / Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set), I understand that this might be happening when I am asserting INTGLFCLR when some other interrupt is asserting INTFLG.
Is my above understanding correct?
I feel that the condition described in Errata, if arising for SW triggered ISRs, then it could happen for PWM-synced ISRs also. However, I haven't observed this error for PWM-synced ISRs at all.
Does the condition mentioned in Errata apply to only SW-triggered interrupts and not PWM-synced ones or is it applicable for all ADC interrupts?
