TMS320F28379D: sci flash kernel

Tool/software:

Hi,

we are using a customized board which is having tms320f28379d. we  need to update the firmware using sci flash kernel. so, I have set the boot select pins GPIO72 & GPIO84 to 0 & 1 respectively. I am using SCIA for flashing (GPOI28-Rx, GPIO29-Tx). we changed the 0x0D00 to 0x815A for emulation test it is downloading the flash kernel to bootRom but main application is not downloading, Can anyone please help me with the correct and concise procedure to begin with. Do I need to make in special changes my code to achieve this? ,

//###########################################################################
//
// FILE:   F2837xD_sci_flash_kernels_cpu01.c
//
// TITLE:  Flash Programming Solution using SCI for F2837xD.
//
//! \addtogroup dual_example_list
//! <h1>Flash Programming Solution SCI for Single or Dual Core</h1>
//!
//! In this example, we set up a UART connection with a host using SCI, receive
//! commands for CPU1 to perform which then sends ACK, NAK, and status packets
//! back to the host after receiving and completing the tasks.  This kernel has
//! the ability to program, verify, unlock, reset, run, and boot CPU2 to SCI
//! boot loader.  Each command either expects no data from the command packet
//! or specific data relative to the command.
//!
//! In this example, we set up a UART connection with a host using SCI, receive
//! an application for CPU01 in -sci8 ascii format to run on the device and
//! program it into Flash.
//
//###########################################################################
// $Copyright:
// Copyright (C) 2013-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
//
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the   
//   distribution.
//
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "F28x_Project.h"
#include "F2837xD_Ipc_drivers.h"
#include "Shared_Erase.h"
#include <string.h>
#include "flash_programming_c28.h" // Flash API example header file
#include "c1_bootrom.h"
#include "F021_F2837xD_C28x.h"

//
// Defines
//
#define C1C2_BROM_IPC_EXECUTE_BOOTMODE_CMD    0x00000013
#define C1C2_BROM_BOOTMODE_BOOT_FROM_SCI      0x00000001
#define C1C2_BROM_BOOTMODE_BOOT_FROM_RAM      0x0000000A
#define C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH    0x0000000B


//
// Function Prototypes
//
void Example_Error(Fapi_StatusType status);
void Init_Flash_Sectors(void);
extern Uint32 SCI_GetFunction(Uint32  BootMode);
void init_gpio();
void Example_Done(void);
void Example_CallFlashAPI();
uint16_t cpu2BootStatus;
//
// Main
//
uint32_t main(void)
{

//
// SCIA Flush
//
    while(!SciaRegs.SCICTL2.bit.TXEMPTY)
    {
    }

//
// Step 1. Initialize System Control:
// Enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
    InitSysCtrl(); //PLL activates

//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
//    InitGpio();

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
    DINT;

//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
//    InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
    IER = 0x0000;
    IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
//    InitPieVectTable();
    InitIpc();

   EALLOW;

   *(volatile uint16_t *)0x00000D00 = 0x815A

  EDIS;

    InitFlash();

//
// Gain pump semaphore
//
    SeizeFlashPump();
    Init_Flash_Sectors();

    Uint32 EntryAddr;

//
// parameter SCI_BOOT for GPIO84,85; parameter SCI_BOOT_ALTERNATE
// for GPIO28,29
//
    EntryAddr = SCI_GetFunction(SCI_BOOT_ALTERNATE);
//    Example_CallFlashAPI();
    return(EntryAddr);
}

//
// Init_Flash_Sectors - Initialize flash API and active flash bank sectors
//
void Init_Flash_Sectors(void)
{
    EALLOW;
    Fapi_StatusType oReturnCheck;

    oReturnCheck = Fapi_initializeAPI(F021_CPU0_BASE_ADDRESS, 150);
    if(oReturnCheck != Fapi_Status_Success)
    {
        Example_Error(oReturnCheck);
    }

    oReturnCheck = Fapi_setActiveFlashBank(Fapi_FlashBank0);
    if(oReturnCheck != Fapi_Status_Success)
    {
        Example_Error(oReturnCheck);
    }
    EDIS;
}

//
// Example_Error - For this example, if an error is found just stop here
//
#ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
        #pragma CODE_SECTION(Example_Error,".TI.ramfunc");
    #else
        #pragma CODE_SECTION(Example_Error,"ramfuncs");
    #endif
#endif
//void Example_Error(Fapi_StatusType status)
//{
//    //
//    // Error code will be in the status parameter
//    //
//    __asm("    ESTOP0");
//}

//
// End of file
//

//
// Example_Error - For this example, if an error is found just stop here
//
#pragma CODE_SECTION(Example_Error,".TI.ramfunc");
void Example_Error(Fapi_StatusType status)
{
    //
    // Error code will be in the status parameter
    //
//    __asm("    ESTOP0");
}

//
// Example_Done - For this example, once we are done just stop here
//
#pragma CODE_SECTION(Example_Done,".TI.ramfunc");
void Example_Done(void)
{
//    __asm("    ESTOP0");
}

this is my output :

6==6
6==6
0==0
0==0
0==0
Bit rate /s of transfer was: 2392.880371
What operation do you want to perform?
         1-DFU CPU1
         2-DFU CPU2
         3-Erase CPU1
         4-Erase CPU2
         5-Verify CPU1
         6-Verify CPU2
         7-Unlock CPU1 Zone 1
         8-Unlock CPU1 Zone 2
         9-Unlock CPU2 Zone 1
        10-Unlock CPU2 Zone 2
        11-Run CPU1
        12-Reset CPU1
        13-Run CPU1 and Boot CPU2
        14-Reset CPU1 and Boot CPU2
        15-Run CPU2
        16-Reset CPU2
         0-DONE
1

calling f021_SendPacket
Downloading E:\CCS\blinky\CPU1_FLASH\blinky.txt to device...