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TMS320F28388D: SCI flash kernels for TMS330F2838xD

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

How can we obtain those SCI flash kernels for TMS330F2838xD? In a 4-year old post you say that they are available online, soon to be released. I don't see them in any of the new SDKs. Please advise.

  • Hi Theo,

    The flash kernels for F2838x are present in the C2000ware path: [C2000ware install]/driverlib/f2838x/examples/c28x_dual/flash_kernel/. Please upvote this response if it answers your question. Slight smile

    Best Regards,

    Delaney

  • Delaney,

    Thanks for the directions. I already tried these files, and I think there is a bigger problem here. I was successful programming CPU1 but not CPU2. After some investigation, I found out that actually this processor does not boot from SCI. Also, the VC++ host app does not call an autobaud function when F2838x is used. Everything worked with F2837xD. Has this code been tested successfully? My understanding is that CPU2 needs to boot from RAM so the kernel would be very different than the one is published in the directory you mention above. Please let me know of your findings.

    Theo 

  • Hi Theo,

    Let me loop in one of the experts from the flash team to take a look at your question.

    Best Regards,

    Delaney

  • Hi Theo,

    Have you taken a look at this app note? Section 5.2.1, CPU1-CPU2 Kernels, details the implementation of these files and how to use them.

    Kind regards,

    Skyler

  • Skyler,

    Yes, I have. My concern is that according to the datasheet of F2838x(page 286) CPU2 does not boot from SCI. Is this correct? If so, the published kernel for CPU2 will not work since it attempts to bootload from SCI.  According to the datasheet the code has to be copied across through message RAM and boot from M0RAM. Is there anything I am getting wrong here?

  • Hi Theo,

    Yes, you are correct. This is why the CPU1 bootloader will receive the CPU2 SCI bootloader and place it into shared RAM for CPU2. Once this has been loaded, CPU1 will boot CPU2 and the CPU2 bootloader will begin executing. Once the CPU2 bootloader is running, firmware upgrades can be performed over I2C.

    Kind regards,

    Skyler

  • Hi Skyler,

    So, what are we going to do about this? The published kernel for CPU2 is wrong. Will you provide another one?

    Thanks,

    Theo

  • Hi Theo,

    I think there is some misunderstanding here, there is no problem with the kernel released in the SDK. The application note I sent in my earlier reply outlines exactly how the kernel works and how it can be used.

    Kind regards,

    Skyler

  • Skyler,

    The kernel in the SDK, has CPU2 attempting to load code from SCI-A. As it used to be with F2837xD. It worked with that processor. Please take a look at the code and if you still think the files are OK, please tell me which file contains the code to load code from IPC and boot from RAM. I can tell you now that  main() which is in flash_kernel_c28x_dual_ex1_sci_flash_kernel_cpu2.c calls sciGetFunction()...

    Theo

  • Hi Theo,

    The CPU1 kernel must be loaded first and then either the RUN_CPU1_BOOT_CPU2 or RESET_CPU1_BOOT_CPU2 commands can be called to load the CPU2 kernel via SCI. CPU1 will receive an image for the CPU2 kernel over SCI and place it in shared RAM. Once complete, the shared RAM is assigned to CPU2 and the CPU2 boot mode is configured such that it will boot to the CPU2 kernel. Once CPU2 configuration is complete, CPU2 will boot to the kernel and be ready to receive kernel commands over SCI. This can be seen in flash_kernel_c28x_dual_ex1_sci_flash_kernel_cpu1.c when command == RUN_CPU1_BOOT_CPU2 or RESET_CPU1_BOOT_CPU2.

    Does this behavior fall in line with your expectations? Please let me know if there's anything unclear about the flow or how the project can be used.

    Kind regards,

    Skyler