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TMS320F28P650SK: GPIO status measurement after device power on

Johnny Chen
Expert 4960 points
Part Number: TMS320F28P650SK

Tool/software:

Hi Champ, 

I am asking for my customer. 

They are using F28P650SK6PZPR (100-pin) device in their end equipment UPS. The device is on control card.

After device powers on and before user configures the IO pins to GPIO, during the time (circled in red) the IO pins are keeping as high-Z input. 

Customer encounters an issue that during the time (high-Z input), they measure the pin directly coming from MCU (disconnect the external circuit) that there is a voltage (~3.3V) big enough to cause the gate driver accidentally drive then damage the MOSFET. In the past, I have never seen a solid voltage coupling to the pin before. 

Remove control card from main board(eliminate system level), and capture the waveform on MCU pin directly.

CH1: Pin 99 

CH2: debug pin to know when the initialized GPIO configuration code is done 

(1). Could the expert kindly check if the pin 99 in this package has any difference from other GPIOs ? or the voltage is caused by the GPIO input leakage current (I believe not) ? 

(2). Could team help to validate it on our 100-pin socket board with F28P650SK6PZPR and prove the device’s GPIO status during the time from device power on to user GPIO configuration ? It means a lot to prove the voltage not caused by the device.

Thanks for the support.

Regards,

Johnny

  • 0
    TI__Expert 4960 points

    Hi expert,

    Any chance to have some input here.

    Thanks,

    Johnny

  • 0 in reply to Johnny Chen
    TI__Expert 3550 points

    Hello,

    The GPIO/muxed pins default to GPIO‐input (high‐impedance) on reset / power‐on. High impedance means the pin is not actively driven (source or sink) by the MCU, so in principle it should float. Thus, the behavior you observe is not inherently impossible per the device‐spec; but getting ~3.3 V high enough to drive something suggests either there is an external circuit pulling it up, or direct internal clamping is involved. Is VDDIO / I/O supply coming up before or with the main chip? If some supplies are present, some internal circuits may be powered earlier, enabling bias or ESD clamp to act.

    Also, in some boot code or debug ROMs / startup sequences, pins might be configured or special code run before your GPIO init. Using a debug GPIO marker is good, but ensure no other early initialization touches it.

    Best Regards,

    Masoud