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TMS320F28379D: Unable to program the DSP with usb_flash_programmer

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE, UNIFLASH

Tool/software:

Hello,

I contact you about an issue we have regarding the software update of your DSP (part number TMS320F28379DPTPS) using USB interface.

 When using the command « usb_flash_programmer.exe F2837xD_usb_flash_kernels_cpu01_dual.dat MISTAAMP_BswTest.dat F2837xD_usb_flash_kernels_cpu02_ram.dat MISTAAMP_BswTest.dat », we get an error and the process stops.

Our problem could be linked with the issue https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1230406/tmdscncd28379d-usb-flash-programmer-does-not-work-with-larger-files

 Could you help us regarding our issue ?

This functionality is really important and needed for our product.

Our configuration:

CCS Version: 10.3.0.00007

Regards

  • Hello

    it seems we have exactly the same problem as Brent Williams in this post (long thread without a solution at the end : switch to chat mode). we also already tried the very small led_ex1_blinky example...

    https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1230406/tmdscncd28379d-usb-flash-programmer-does-not-work-with-larger-files

    Best Regards"

  • Hi,

    What version of C2000ware are you using to attempt the USB Flash Program load?

    Thanks and regards,

    Charles

  • Hi,

    we tried V3_04_00_00, we also tried  V5_04_00_00, same problem.

    Was Texas Instruments able to help Brent Williams perform a firmware update using the native bootloader ?

     TMDSCNCD28379D: USB Flash Programmer does not work with larger files 

    Best Regards

    Christophe

  • reminder:

    The update operation involves the "usb_flash_programmer", but also the "usb_flash_kernel".

    Christophe

  • Hi Christophe,

    The conclusion to the Brent Williams USB Flash Programmer thread was that the USB device he was using needed to be changed

    One of our experts has listed the steps in this thread for success with this issue.

    Thanks and regards,

    Charles

  • Hi Charles,
    The issue seems to be something else than what is described in the USB Flash Programmer thread .
    Apparently Christophe is able to reproduce it on the TI Delfino F28379D controlCARD:
    -USB boot + USB_flash_programmer (from C2000Ware 5.02) to burn blinky_dc_cpu1 works
    -USB boot + USB_flash_programmer (from C2000Ware 5.02) to burn larger file does not works.

    Do you have a TI Delfino F28379D controlCARD to repoduce it?

    Thanks in advance,

    Anthony

  • Hi,

    If you have a I Delfino F28379D controlCARD, we can provide our firmware binary in order to help to reproduce the problem.

    Thanks in advance,

    CGUERIT

  • We try to update the firmware of our Delfino F28379D controlCARD using TI tools usb_flash_programmer and c from C200Ware v5.02, and our firmware was recompiled using C200Ware v5.02.

    usb_flash_programmer FAILS, error 0x79 (timeout) after 14336 bytes, no error explanation.

    We then tried to debug TI usb_flash_kernel program

    The usb_flash_kernel FAILS and do not provide error information... it only stops the DSP : asm(ESTOP0)

    The error happens inside CopyData function, after 7 block transfers, in the "program non aligned block", after Fapi_doVerify call (line 213).

    It seems there is a problem between TI usb_flash_programmer and TI usb_flash_programmer programs.

    Do you have an explanation / history for this problem / situation ?

    Thanks in advance.

    Best regards

  • When we flash the demo firmware blinky_dc with the kernel and usb_flash_programmer, it works.

    Best regards

  • Hi

    Can you tell us how to find the reason why the usb_flash_kernel fails when updating our firmware? A tolerance problem on the size (our firmware is bigger than TI blinky_dc firmware)? Alignment constraints ? We can provide our firmware binary, our linker script, .. what else ?

    Best regards

    CGuerit

  • Hi

    My collegue S. Tarik was working on the same subject, he as opened a post 2 months ago concerning the same subject (cannot flash firmware : error) , without any answer from ti, except finally a question: " Do you still require support?"...

    e2e.ti.com/.../tms320f28379d-usb-flashing-issue-with-tms320f28379d-timeout-adjustment-not-effective

    Best regards

    CGuerit

  • Hi Christophe,

    The error happens inside CopyData function, after 7 block transfers, in the "program non aligned block", after Fapi_doVerify call (line 213).

    Have you checked the .dat file generated by the linker to understand if alignement is ok?
    Are you using ALIGN(8) as default for this linker command file?


  • Hi Anber,

    Yes we did check alignment a short time after our post 2 days ago.

    He's our link cmd file.

    // The user must define CLA_C in the project linker settings if using the
    // CLA C compiler
    // Project Properties -> C2000 Linker -> Advanced Options -> Command File
    // Preprocessing -> --define
    #ifdef CLA_C
    // Define a size for the CLA scratchpad area that will be used
    // by the CLA compiler for local symbols and temps
    // Also force references to the special symbols that mark the
    // scratchpad are.
    CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start
    #endif //CLA_C
    
    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode   */
    
       BEGIN           	: origin = 0x080000,   length = 0x000002
       RAMM0           	: origin = 0x000123,   length = 0x0002DD
       RAMD0           	: origin = 0x00B000,   length = 0x000800
       RAMLS0          	: origin = 0x008000,   length = 0x000800
       RAMLS1          	: origin = 0x008800,   length = 0x000800   
       /* RAMLS4      	   : origin = 0x00A000, length = 0x000800 */
       /* RAMLS5           : origin = 0x00A800, length = 0x000800 */
       RAMLS4_5         : origin = 0x00A000,   length = 0x001000
       
       // RAMGS14          : origin = 0x01A000,   length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       // RAMGS15          : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       // RAMGS14_15         : origin = 0x01A000,   length = 0x001FF8
       RAMGS14_1           : origin = 0x01A000,   length = 0x0003FF
       RAMGS14_2__15       : origin = 0x01A400,   length = 0x001BF0
    
    //   RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RESET           	: origin = 0x3FFFC0,   length = 0x000002
    
       /* Flash sectors */
       FLASHA           : origin = 0x080002,   length = 0x001FFE	/* on-chip Flash */
       FLASHB           : origin = 0x082000,   length = 0x002000	/* on-chip Flash */
       FLASHC           : origin = 0x084000,   length = 0x002000	/* on-chip Flash */
       FLASHD           : origin = 0x086000,   length = 0x002000	/* on-chip Flash */
       FLASHE           : origin = 0x088000,   length = 0x008000	/* on-chip Flash */
       FLASHF           : origin = 0x090000,   length = 0x008000	/* on-chip Flash */
       FLASHG           : origin = 0x098000,   length = 0x008000	/* on-chip Flash */
       FLASHH           : origin = 0x0A0000,   length = 0x008000	/* on-chip Flash */
       FLASHI           : origin = 0x0A8000,   length = 0x008000	/* on-chip Flash */
       FLASHJ           : origin = 0x0B0000,   length = 0x008000	/* on-chip Flash */
       FLASHK           : origin = 0x0B8000,   length = 0x002000	/* on-chip Flash */
       FLASHL           : origin = 0x0BA000,   length = 0x002000	/* on-chip Flash */
       FLASHM           : origin = 0x0BC000,   length = 0x002000	/* on-chip Flash */
       //FLASHN           : origin = 0x0BE000, length = 0x001FF0	/* on-chip Flash */
       FLASHN1           : origin = 0x0BE000, length = 0x003FF	/* on-chip Flash */
       FLASHN2           : origin = 0x0BE400, length = 0x001BF0	/* on-chip Flash */
    
    //   FLASHN_RSVD     : origin = 0x0BFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
    PAGE 1 : 
    
       BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
       RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
    //   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
       RAMLS2      		: origin = 0x009000,   length = 0x000800
       RAMLS3      		: origin = 0x009800,   length = 0x000800
    
       RAMGS0           : origin = 0x00C000,   length = 0x001000
       RAMGS1           : origin = 0x00D000,   length = 0x001000
       //RAMGS2           : origin = 0x00E000,   length = 0x001000
       //RAMGS3           : origin = 0x00F000,   length = 0x001000
       RAMGS2_3         : origin = 0x00E000,   length = 0x002000
       RAMGS4           : origin = 0x010000,   length = 0x001000
       RAMGS5           : origin = 0x011000,   length = 0x001000
       RAMGS6           : origin = 0x012000,   length = 0x001000
       RAMGS7           : origin = 0x013000,   length = 0x001000
       RAMGS8           : origin = 0x014000,   length = 0x001000
       RAMGS9           : origin = 0x015000,   length = 0x001000
       RAMGS10          : origin = 0x016000,   length = 0x001000
    
    //   RAMGS11          : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */
    
    //   RAMGS11_RSVD     : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMGS11          : origin = 0x017000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS12          : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS13          : origin = 0x019000,   length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
    
       EMIF1_CS0n       : origin = 0x80000000, length = 0x10000000
       EMIF1_CS2n       : origin = 0x00100000, length = 0x00200000
       EMIF1_CS3n       : origin = 0x00300000, length = 0x00080000
       EMIF1_CS4n       : origin = 0x00380000, length = 0x00060000
       EMIF2_CS0n       : origin = 0x90000000, length = 0x10000000
       EMIF2_CS2n       : origin = 0x00002000, length = 0x00001000
    
       CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
       CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
       
      
       CLA1_MSGRAMLOW   : origin = 0x001480,   length = 0x000080
       CLA1_MSGRAMHIGH  : origin = 0x001500,   length = 0x000080
    }
    
    SECTIONS
    {
       /* Allocate program areas: */
       .cinit           : > FLASHB | FLASHC,     PAGE = 0, ALIGN(8)
       .text            : >> FLASHE | FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ,      PAGE = 0, ALIGN(8)
       codestart        : > BEGIN       PAGE = 0, ALIGN(8)
       .stack           : > RAMM1       PAGE = 1
       .switch          : > FLASHB | FLASHC     PAGE = 0, ALIGN(8)
    
       /* Allocate uninitalized data sections: */
     #if defined(__TI_EABI__)
       .init_array         : > FLASHB | FLASHC,       PAGE = 0, ALIGN(8)
       .bss                : > RAMLS2 | RAMLS3,       PAGE = 1
       .bss:output         : > RAMLS2 | RAMLS3,       PAGE = 1
       .data               : > RAMLS2 | RAMLS3,       PAGE = 1
       .sysmem             : > RAMLS2 | RAMLS3,       PAGE = 1
       /* Initalized sections go in Flash */
       .const              : > FLASHK | FLASHL | FLASHM,       PAGE = 0, ALIGN(8)
    #else
       .pinit              : > FLASHB | FLASHC,       PAGE = 0, ALIGN(8)
       .ebss               : > RAMLS2 | RAMLS3,		 PAGE = 1
       .esysmem            : > RAMLS2 | RAMLS3,       PAGE = 1
       /* Initalized sections go in Flash */
       .econst             : > FLASHK | FLASHL | FLASHM,  	 PAGE = 0, ALIGN(8)
    #endif
    
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
    
       .em2_cs0         : > EMIF2_CS0n, PAGE = 1
       .em2_cs2         : > EMIF2_CS2n, PAGE = 1
    
    //   SHARERAMGS0		: > RAMGS0,		PAGE = 1
    //   SHARERAMGS1		: > RAMGS1,		PAGE = 1
    //   SHARERAMGS2		: > RAMGS2,		PAGE = 1
    //   ramgs0           : > RAMGS0,     PAGE = 1
    //   ramgs1           : > RAMGS1,     PAGE = 1
       SHARERAM_CPU1      : > RAMGS2_3 | RAMGS4 |RAMGS5 | RAMGS6 | RAMGS7,		PAGE = 1
       SHARERAM_CPU2      : > RAMGS8 | RAMGS9 | RAMGS10 |RAMGS11 | RAMGS12 | RAMGS13,		PAGE = 1
    
       RAM_CPU1TOCPU2           : > CPU1TOCPU2RAM,     PAGE = 1
       RAM_CPU2TOCPU1           : > CPU2TOCPU1RAM,     PAGE = 1
    
    /* Digital Controller Library functions */ /*!!!!!!! DCL a remapper si utilisé !!!! */
    	dclfuncs		: > RAMLS0,		PAGE = 0
    	dcl32funcs		: > RAMLS0,		PAGE = 0
    
    /* CLA specific sections */
       #if defined(__TI_EABI__)
       		Cla1Prog    : LOAD = FLASHD,
                          RUN = RAMLS4_5,
                          LOAD_START(Cla1funcsLoadStart),
                          LOAD_END(Cla1funcsLoadEnd),
                          RUN_START(Cla1funcsRunStart),
                          LOAD_SIZE(Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(8)
       #else
          	Cla1Prog    : LOAD = FLASHD,
                          RUN = RAMLS4_5,
                          LOAD_START(_Cla1funcsLoadStart),
                          LOAD_END(_Cla1funcsLoadEnd),
                          RUN_START(_Cla1funcsRunStart),
                          LOAD_SIZE(_Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(8)
       #endif
    
       CLADataLS0		: > RAMLS0, PAGE=0
       CLADataLS1		: > RAMLS1, PAGE=0
    
       Cla1ToCpu1MsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       Cla1ToCpu2MsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       Cpu1ToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
       Cpu2ToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
    
    
    					
    #ifdef __TI_COMPILER_VERSION__
        #if __TI_COMPILER_VERSION__ >= 15009000
            #if defined(__TI_EABI__)
                .TI.ramfunc : {} LOAD = FLASHD,
    							 RUN = RAMD0,
                                     LOAD_START(RamfuncsLoadStart),
                                     LOAD_SIZE(RamfuncsLoadSize),
                                     LOAD_END(RamfuncsLoadEnd),
                                     RUN_START(RamfuncsRunStart),
                                     RUN_SIZE(RamfuncsRunSize),
                                     RUN_END(RamfuncsRunEnd),
                                     PAGE = 0, ALIGN(8)
            #else
                .TI.ramfunc : {} LOAD = FLASHD,
    							 RUN = RAMD0,
                                 LOAD_START(_RamfuncsLoadStart),
                                 LOAD_SIZE(_RamfuncsLoadSize),
                                 LOAD_END(_RamfuncsLoadEnd),
                                 RUN_START(_RamfuncsRunStart),
                                 RUN_SIZE(_RamfuncsRunSize),
                                 RUN_END(_RamfuncsRunEnd),
                                 PAGE = 0, ALIGN(8)
            #endif
        #else
       ramfuncs         : LOAD = FLASHD,
                          RUN = RAMD0,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_SIZE(_RamfuncsLoadSize),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             RUN_SIZE(_RamfuncsRunSize),
                             RUN_END(_RamfuncsRunEnd),
                             PAGE = 0, ALIGN(8)
        #endif
    
    #endif
    
       /* Identification & Trim specific sections */
    	GROUP : LOAD = FLASHN1,
                RUN = RAMGS14_1,
                LOAD_START(_IdentLoadStart),
                LOAD_END(_IdentLoadEnd),
                RUN_START(_IdentRunStart),
                LOAD_SIZE(_IdentLoadSize),
                PAGE = 0, ALIGN(8)
    	{
    		SW_IDENTIFICATION:{}
    		ANALOG_TRIM:{}
    	}
    
       /* Calibration specific sections */
    	GROUP : LOAD = FLASHN2,
                RUN = RAMGS14_2__15,
                LOAD_START(_CalibrationLoadStart),
                LOAD_END(_CalibrationLoadEnd),
                RUN_START(_CalibrationRunStart),
                LOAD_SIZE(_CalibrationLoadSize),
                PAGE = 0, ALIGN(8)
    	{
    		CALIBRATION_HEADER:{}
    		CALIBRATION:{}
    	}
    	
    	/* Non Volatile memory specific sections */
    	GROUP : > RAMGS0, PAGE = 1, ALIGN(8),
    			RUN_START(_NVM_RunStart),
                LOAD_SIZE(_NVM_Size)
    	{
    		NVM_HEADER:{}
    		NVM:{}
    	}
    	//GROUP : > RAMGS1, PAGE = 1, ALIGN(8)
    	//{
    	//	NVM_CPU2_HEADER:{}
    	//	NVM_CPU2:{}
    	//}
    
       /* The following section definitions are required when using the IPC API Drivers */
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            PUTBUFFER
            PUTWRITEIDX
            GETREADIDX
        }
    
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
    
    #ifdef CLA_C
       /* CLA C compiler sections */
       //
       // Must be allocated to memory the CLA has write access to
       //
       CLAscratch       :
                         { *.obj(CLAscratch)
                         . += CLA_SCRATCHPAD_SIZE;
                         *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 0
    
       .scratchpad      : > RAMLS1,       PAGE = 0
       .bss_cla		    : > RAMLS1,       PAGE = 0
       .const_cla	    :  LOAD = FLASHB,
                           RUN = RAMLS1,
                           RUN_START(_Cla1ConstRunStart),
                           LOAD_START(_Cla1ConstLoadStart),
                           LOAD_SIZE(_Cla1ConstLoadSize),
                           PAGE = 0
    #endif //CLA_C
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

    Best Regards

    CGuerit

  • Hi,

    And i propose to send you the firmware binary file, if you want to investigate.

    Best Regards

    CGuerit

  • Hi

    We are available to provide you with further information for investigation,

    do you need additional information ?

    Best Regards

    CGuerit

  • Hi

    We have no news concerning this thread,

    We followed the firmware update via USB procedure.

    The usb_flash_kernel fails when updating our firmware and stops (no error reported) ? What could be the possible reasons ?

    We provided the linker script (memory/flash mappings) and we can provide the .dat file of the firmware.

    Any advice ?

    Best regards,

    CGuerit

  • Hi,

    Apologies for the delay in response, the expert is currently out of office.

    Question, what is the size of the current file in bytes compared to the size of the flash memory you wish to program?

    In the meanwhile, yes can you provide the further information through the messages to me on the file itself?

    Thanks and regards,

    Charles

  • Hi Charles,

    Reminder: our microcontroller is a TMS320F28379DPTPS, and flash programming works perfectly using JTAG (CCS or uniflash)

    CCS produces a ".out" file : .out 765K and a ".hex" file (for uniflash) : 247K

    HEX2000 converts the ".out" file into a ".dat" file : 106K

    We use the ".dat" for usb flash programmer.

    Note : compilation is in "debug mode".

    Flash programming stops (timeout) after ~13K (usb flash programmer message)

    I join one more time the linker script to this message, I propose to send you the ".dat" file

    Best regards

    Christophe

    // The user must define CLA_C in the project linker settings if using the
    // CLA C compiler
    // Project Properties -> C2000 Linker -> Advanced Options -> Command File
    // Preprocessing -> --define
    #ifdef CLA_C
    // Define a size for the CLA scratchpad area that will be used
    // by the CLA compiler for local symbols and temps
    // Also force references to the special symbols that mark the
    // scratchpad are.
    CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start
    #endif //CLA_C
    
    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode   */
    
       BEGIN           	: origin = 0x080000,   length = 0x000002
       RAMM0           	: origin = 0x000123,   length = 0x0002DD
       RAMD0           	: origin = 0x00B000,   length = 0x000800
       RAMLS0          	: origin = 0x008000,   length = 0x000800
       RAMLS1          	: origin = 0x008800,   length = 0x000800   
       /* RAMLS4      	   : origin = 0x00A000, length = 0x000800 */
       /* RAMLS5           : origin = 0x00A800, length = 0x000800 */
       RAMLS4_5         : origin = 0x00A000,   length = 0x001000
       
       // RAMGS14          : origin = 0x01A000,   length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       // RAMGS15          : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       // RAMGS14_15         : origin = 0x01A000,   length = 0x001FF8
       RAMGS14_1           : origin = 0x01A000,   length = 0x0003FF
       RAMGS14_2__15       : origin = 0x01A400,   length = 0x001BF0
    
    //   RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RESET           	: origin = 0x3FFFC0,   length = 0x000002
    
       /* Flash sectors */
       FLASHA           : origin = 0x080002,   length = 0x001FFE	/* on-chip Flash */
       FLASHB           : origin = 0x082000,   length = 0x002000	/* on-chip Flash */
       FLASHC           : origin = 0x084000,   length = 0x002000	/* on-chip Flash */
       FLASHD           : origin = 0x086000,   length = 0x002000	/* on-chip Flash */
       FLASHE           : origin = 0x088000,   length = 0x008000	/* on-chip Flash */
       FLASHF           : origin = 0x090000,   length = 0x008000	/* on-chip Flash */
       FLASHG           : origin = 0x098000,   length = 0x008000	/* on-chip Flash */
       FLASHH           : origin = 0x0A0000,   length = 0x008000	/* on-chip Flash */
       FLASHI           : origin = 0x0A8000,   length = 0x008000	/* on-chip Flash */
       FLASHJ           : origin = 0x0B0000,   length = 0x008000	/* on-chip Flash */
       FLASHK           : origin = 0x0B8000,   length = 0x002000	/* on-chip Flash */
       FLASHL           : origin = 0x0BA000,   length = 0x002000	/* on-chip Flash */
       FLASHM           : origin = 0x0BC000,   length = 0x002000	/* on-chip Flash */
       //FLASHN           : origin = 0x0BE000, length = 0x001FF0	/* on-chip Flash */
       FLASHN1           : origin = 0x0BE000, length = 0x003FF	/* on-chip Flash */
       FLASHN2           : origin = 0x0BE400, length = 0x001BF0	/* on-chip Flash */
    
    //   FLASHN_RSVD     : origin = 0x0BFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
    PAGE 1 : 
    
       BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
       RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
    //   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
       RAMLS2      		: origin = 0x009000,   length = 0x000800
       RAMLS3      		: origin = 0x009800,   length = 0x000800
    
       RAMGS0           : origin = 0x00C000,   length = 0x001000
       RAMGS1           : origin = 0x00D000,   length = 0x001000
       //RAMGS2           : origin = 0x00E000,   length = 0x001000
       //RAMGS3           : origin = 0x00F000,   length = 0x001000
       RAMGS2_3         : origin = 0x00E000,   length = 0x002000
       RAMGS4           : origin = 0x010000,   length = 0x001000
       RAMGS5           : origin = 0x011000,   length = 0x001000
       RAMGS6           : origin = 0x012000,   length = 0x001000
       RAMGS7           : origin = 0x013000,   length = 0x001000
       RAMGS8           : origin = 0x014000,   length = 0x001000
       RAMGS9           : origin = 0x015000,   length = 0x001000
       RAMGS10          : origin = 0x016000,   length = 0x001000
    
    //   RAMGS11          : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */
    
    //   RAMGS11_RSVD     : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMGS11          : origin = 0x017000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS12          : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS13          : origin = 0x019000,   length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
    
       EMIF1_CS0n       : origin = 0x80000000, length = 0x10000000
       EMIF1_CS2n       : origin = 0x00100000, length = 0x00200000
       EMIF1_CS3n       : origin = 0x00300000, length = 0x00080000
       EMIF1_CS4n       : origin = 0x00380000, length = 0x00060000
       EMIF2_CS0n       : origin = 0x90000000, length = 0x10000000
       EMIF2_CS2n       : origin = 0x00002000, length = 0x00001000
    
       CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
       CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
       
      
       CLA1_MSGRAMLOW   : origin = 0x001480,   length = 0x000080
       CLA1_MSGRAMHIGH  : origin = 0x001500,   length = 0x000080
    }
    
    SECTIONS
    {
       /* Allocate program areas: */
       .cinit           : > FLASHB | FLASHC,     PAGE = 0, ALIGN(8)
       .text            : >> FLASHE | FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ,      PAGE = 0, ALIGN(8)
       codestart        : > BEGIN       PAGE = 0, ALIGN(8)
       .stack           : > RAMM1       PAGE = 1
       .switch          : > FLASHB | FLASHC     PAGE = 0, ALIGN(8)
    
       /* Allocate uninitalized data sections: */
     #if defined(__TI_EABI__)
       .init_array         : > FLASHB | FLASHC,       PAGE = 0, ALIGN(8)
       .bss                : > RAMLS2 | RAMLS3,       PAGE = 1
       .bss:output         : > RAMLS2 | RAMLS3,       PAGE = 1
       .data               : > RAMLS2 | RAMLS3,       PAGE = 1
       .sysmem             : > RAMLS2 | RAMLS3,       PAGE = 1
       /* Initalized sections go in Flash */
       .const              : > FLASHK | FLASHL | FLASHM,       PAGE = 0, ALIGN(8)
    #else
       .pinit              : > FLASHB | FLASHC,       PAGE = 0, ALIGN(8)
       .ebss               : > RAMLS2 | RAMLS3,		 PAGE = 1
       .esysmem            : > RAMLS2 | RAMLS3,       PAGE = 1
       /* Initalized sections go in Flash */
       .econst             : > FLASHK | FLASHL | FLASHM,  	 PAGE = 0, ALIGN(8)
    #endif
    
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
    
       .em2_cs0         : > EMIF2_CS0n, PAGE = 1
       .em2_cs2         : > EMIF2_CS2n, PAGE = 1
    
    //   SHARERAMGS0		: > RAMGS0,		PAGE = 1
    //   SHARERAMGS1		: > RAMGS1,		PAGE = 1
    //   SHARERAMGS2		: > RAMGS2,		PAGE = 1
    //   ramgs0           : > RAMGS0,     PAGE = 1
    //   ramgs1           : > RAMGS1,     PAGE = 1
       SHARERAM_CPU1      : > RAMGS2_3 | RAMGS4 |RAMGS5 | RAMGS6 | RAMGS7,		PAGE = 1
       SHARERAM_CPU2      : > RAMGS8 | RAMGS9 | RAMGS10 |RAMGS11 | RAMGS12 | RAMGS13,		PAGE = 1
    
       RAM_CPU1TOCPU2           : > CPU1TOCPU2RAM,     PAGE = 1
       RAM_CPU2TOCPU1           : > CPU2TOCPU1RAM,     PAGE = 1
    
    /* Digital Controller Library functions */ /*!!!!!!! DCL a remapper si utilisé !!!! */
    	dclfuncs		: > RAMLS0,		PAGE = 0
    	dcl32funcs		: > RAMLS0,		PAGE = 0
    
    /* CLA specific sections */
       #if defined(__TI_EABI__)
       		Cla1Prog    : LOAD = FLASHD,
                          RUN = RAMLS4_5,
                          LOAD_START(Cla1funcsLoadStart),
                          LOAD_END(Cla1funcsLoadEnd),
                          RUN_START(Cla1funcsRunStart),
                          LOAD_SIZE(Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(8)
       #else
          	Cla1Prog    : LOAD = FLASHD,
                          RUN = RAMLS4_5,
                          LOAD_START(_Cla1funcsLoadStart),
                          LOAD_END(_Cla1funcsLoadEnd),
                          RUN_START(_Cla1funcsRunStart),
                          LOAD_SIZE(_Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(8)
       #endif
    
       CLADataLS0		: > RAMLS0, PAGE=0
       CLADataLS1		: > RAMLS1, PAGE=0
    
       Cla1ToCpu1MsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       Cla1ToCpu2MsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       Cpu1ToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
       Cpu2ToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
    
    
    					
    #ifdef __TI_COMPILER_VERSION__
        #if __TI_COMPILER_VERSION__ >= 15009000
            #if defined(__TI_EABI__)
                .TI.ramfunc : {} LOAD = FLASHD,
    							 RUN = RAMD0,
                                     LOAD_START(RamfuncsLoadStart),
                                     LOAD_SIZE(RamfuncsLoadSize),
                                     LOAD_END(RamfuncsLoadEnd),
                                     RUN_START(RamfuncsRunStart),
                                     RUN_SIZE(RamfuncsRunSize),
                                     RUN_END(RamfuncsRunEnd),
                                     PAGE = 0, ALIGN(8)
            #else
                .TI.ramfunc : {} LOAD = FLASHD,
    							 RUN = RAMD0,
                                 LOAD_START(_RamfuncsLoadStart),
                                 LOAD_SIZE(_RamfuncsLoadSize),
                                 LOAD_END(_RamfuncsLoadEnd),
                                 RUN_START(_RamfuncsRunStart),
                                 RUN_SIZE(_RamfuncsRunSize),
                                 RUN_END(_RamfuncsRunEnd),
                                 PAGE = 0, ALIGN(8)
            #endif
        #else
       ramfuncs         : LOAD = FLASHD,
                          RUN = RAMD0,
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_SIZE(_RamfuncsLoadSize),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             RUN_SIZE(_RamfuncsRunSize),
                             RUN_END(_RamfuncsRunEnd),
                             PAGE = 0, ALIGN(8)
        #endif
    
    #endif
    
       /* Identification & Trim specific sections */
    	GROUP : LOAD = FLASHN1,
                RUN = RAMGS14_1,
                LOAD_START(_IdentLoadStart),
                LOAD_END(_IdentLoadEnd),
                RUN_START(_IdentRunStart),
                LOAD_SIZE(_IdentLoadSize),
                PAGE = 0, ALIGN(8)
    	{
    		SW_IDENTIFICATION:{}
    		ANALOG_TRIM:{}
    	}
    
       /* Calibration specific sections */
    	GROUP : LOAD = FLASHN2,
                RUN = RAMGS14_2__15,
                LOAD_START(_CalibrationLoadStart),
                LOAD_END(_CalibrationLoadEnd),
                RUN_START(_CalibrationRunStart),
                LOAD_SIZE(_CalibrationLoadSize),
                PAGE = 0, ALIGN(8)
    	{
    		CALIBRATION_HEADER:{}
    		CALIBRATION:{}
    	}
    	
    	/* Non Volatile memory specific sections */
    	GROUP : > RAMGS0, PAGE = 1, ALIGN(8),
    			RUN_START(_NVM_RunStart),
                LOAD_SIZE(_NVM_Size)
    	{
    		NVM_HEADER:{}
    		NVM:{}
    	}
    	//GROUP : > RAMGS1, PAGE = 1, ALIGN(8)
    	//{
    	//	NVM_CPU2_HEADER:{}
    	//	NVM_CPU2:{}
    	//}
    
       /* The following section definitions are required when using the IPC API Drivers */
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            PUTBUFFER
            PUTWRITEIDX
            GETREADIDX
        }
    
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
    
    #ifdef CLA_C
       /* CLA C compiler sections */
       //
       // Must be allocated to memory the CLA has write access to
       //
       CLAscratch       :
                         { *.obj(CLAscratch)
                         . += CLA_SCRATCHPAD_SIZE;
                         *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 0
    
       .scratchpad      : > RAMLS1,       PAGE = 0
       .bss_cla		    : > RAMLS1,       PAGE = 0
       .const_cla	    :  LOAD = FLASHB,
                           RUN = RAMLS1,
                           RUN_START(_Cla1ConstRunStart),
                           LOAD_START(_Cla1ConstLoadStart),
                           LOAD_SIZE(_Cla1ConstLoadSize),
                           PAGE = 0
    #endif //CLA_C
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

  • Hi Christophe

    Request you to provide the .dat files also.  I will have to reproduce this issue and figure out the cause. 

    Did you check till what address if the flash getting programmed by the kernel? 

    Best Regards

    Siddharth

  • Hi Siddharth,

    Please find attached our DSP firmware, in ".dat" format. You already have the linker script.

    The usb flash kernel stops without sending an error code to the usb flash programmer.

    Flash programming stops (timeout) after ~13K (usb flash programmer message)

    Best Regards

    Christophe
    DSPFirmware_BswTest.dat

  • Hi Siddharth,

    Were you able to retrieve the ".dat" file that I sent you on Wednesday?

    Best Regards

    Christophe

  • Hi Siddharth,

    Were you able to retrieve the ".dat" file that I sent you on Wednesday?

    Best Regards

    Christophe

  • Christophe

    Yes,  I got the .dat file that you had shared.  

    I am trying to reproduce the issue on a Control Card but running into some other issue. 
    The usb flash programmer is unable to detect the device connected. 

    Will keep you posted on my findings.

    Best Regards

    Siddharth

  • Siddharth

    I hope you have a TI Delfino F28379D controlCARD (and not the LAUNCHXL).

    May be this can help you:

    => Did you install the driver for USB bootloader ?

    => Did you write 0x0C5A to the boot mode select address (0xD00) with the debugger ?

    Best Regards,

    Christophe

  • Christophe 

    I had to manually install the driver to make it recognized as "F28x7x_USB_Boot_Loader" instead of "Stellaris Device Firmware Upgrade". 

    After this, I was able to run the usb flash programmer utility. 

    I was able to recreate the issue that you are seeing.  Looks like there are sections in the file which are not aligned on 8 byte boundary. The Fapi_Verify function fails for address 0xBE02A. 

    request you to share the .out and the .map file that is generated .

    You can also see if using the "fill = 0xFFFF" option in the linker command file for the FLASHN1 section solves this issue. 

    Best Regards

    Siddharth

  • Hi Christophe,

    Pls check if the following symbols are aligned on 8 bytes

    SW_IDENTIFICATION
    ANALOG_TRIM

    Best Regards

    Siddharth

  • Hi Siddarth,

    Thanks for the advice, the GROUP was declared align(8), i added align(8) for SW_IDENTIFICATION and ANALOG_TRIM elements. 

    Using the "usb flashing procedure" (jtag 0xD00 configuration / reset / resume) the usb flash programmer now fails while flashing the application on the second cpu (see below)

    Important: flash programming works using jtag and fails only for usb).

    I join the modified linker script, map file, application file, and the 2 kernels.

    Any ideas ?

    Best Regards


    Manufacturer: Texas Instruments
    Product ID: TMS320F28x7x USB Boot Loader
    Serial number: 2

    Sending 17434 bytes of data from file F2837xD_usb_flash_kernels_cpu01.dat... done!
    17434 out of 17434 bytes sent
    Success!
    Manufacturer: Texas Instruments
    Product ID: TMS320F2837xD USB Boot Loader
    Serial number: 2

    Sending 105074 bytes of data from file MISTAAMP_BswTest.dat... done!
    105074 out of 105074 bytes sent
    Success!
    Manufacturer: Texas Instruments
    Product ID: TMS320F2837xD USB Boot Loader
    Serial number: 2

    Sending 9754 bytes of data from file F2837xD_usb_flash_kernels_cpu02.dat... done!
    9754 out of 9754 bytes sent
    Success!
    Manufacturer: Texas Instruments
    Product ID: TMS320F2837xD USB Boot Loader
    Serial number: 2

    Sending 105074 bytes of data from file MISTAAMP_BswTest.dat...
    Error sending bulk transfer: 0x0079
    64 out of 105074 bytes sent
    USB operation failed!

    join.zip

  • Hello Siddharth,

    Do you have news about this issue ?

    Regards,

    Sébastien DESHAYES

  • Hi Sebastien

    Was held up with release activities and could not get to look into it during the last week. 

    Will take a look into it and get back to you in the next couple of days. 

    Best Regards

    Siddharth

  • Hi Sebastien

    Looks like the CPU2 kernel is not getting programmed. 

    USB is receiving the data , however the call to the Flash programming command does not seem to be able to write to the RAM address (0xE000).

    Will check with the Flash API expert and get back to you. 

    Best Regards

    Siddharth

  • Hello Siddharth,

    Thanks for still working on this issue.

    I hope to have an answer from your expert soon.

    Regards,

    Sébastien DESHAYES

  • Hi Sébastien,

    Related thread: TMS320F28379D: USB bootloader CPU2 loses its code when power is cycled. - C2000 microcontrollers forum - C2000Tm︎ microcontrollers - TI E2E support forums

    What is CPU2's boot ROM configured to, is it set to CPU2_FLASH configuration?

    If this does not resolve the issue, what is seen as the value of oFlashStatus variable?

    Thanks and regards,

    Charles