TMS320F28P650DK: ECC test issue

Part Number: TMS320F28P650DK

Tool/software:

Good afternoon,

I'm using TMS320F28P650DK9 microcontroller and I'm trying to perform ECC error test following the Diagnostic library example.

The test is usually working, but I'm experiencing a few situation in which the test had failed.

As the issue is very sporadic, I'm not able to reproduce it on my test bench (it was found on a couple of samples of our customer).

- It seems that onces the test has failed it always fails until I remove power supply (a SW reset seems not enaugh).

Can you confirm this?

- Is it possible that an instable power supply during the test can lead to the failure?

- Is there any known issue on the ECC test procedure ?

- Can you suggest a possible improvement or verification that we can introduce to increase the robustness of the test?

Many thanks,

Barbara

  

  • There is a known issue with the example where it uses an address for a Flash location that is not programmed, so it generates an incorrect error type (an unexpected correctable error). I don't think this would cause the behavior you're seeing though.

    I think one thing that you need to be careful about implementing this test is to make sure not to use the Flash while the test mode is active. So that includes the ISR caused by the error and any functions it may call, and other interrupts that may happen to occur during that time (it is likely safer to disable them temporarily).

    If neither of those suggestions help, see if you can get any more details. In what way is it failing? Is the application crashing? Or is the test function just returning a fail value? What is the nature of the failure (no NMI generated, interrupt/error status is incorrect, etc...)?

    Whitney

  • Hello, 

    thankyou for the answer.

    Is it a problem if ISR located in RAM are active?

    In addition, can you give a feedback on these two topics:

          Is it possible that the failure is removed ony with a reset of power supply and not with a SW reset?

          Is it possible that an instable power supply during the test can lead to the failure?

    Unfortunately we don't have additional information as we are not able to reproduce the issue on our test bench.

    But the customer is pressing for a feedback.

    Thankyou

  • Is it a problem if ISR located in RAM are active?

    If the ISR is located in RAM and you can confirm it doesn't call any functions that are located in Flash, it should be okay.

    Is it possible that the failure is removed ony with a reset of power supply and not with a SW reset?

    It's hard to guess why this may be the case without more info about the nature of the failure. I've gone through the descriptions of the related registers and they all appear to be reset by SYSRSn (debugger reset), not POR. 

    I can't think of any reason why an unstable power supply would affect this test in particular.

    How do they know it's the ECC error test causing the issue? What does the application do in event of a failure of the ECC test?

    Whitney