Part Number: TMS320F28P550SJ
Tool/software:
Hi Champs,
I ask this for customer.
We recently encountered pulse events using EPWM with XBAR out5, and when using it as the synchronization source for EPWM5 and EPWM6, we found that occasionally synchronization fails.
The configuration is as follows:
1) The CLB input receives an output from CMPSS and uses an Input Edge filter to generate an edge event (a pulse event with a width of one 120M CLK). The CLB outputs this event through the CLB OUTPUTXBAR to GPIO30 and GPIO31.
2) Configure the INPUTXBAR to use GPIO30 as XBAR_Input5 and GPIO31 as XBAR_Input6;
3) Set EPWM5's SYNCI to XBAR out5 and EPWM6's SYNCI to XBAR out6;
4) External circuits for GPIO30 and GPIO31 are left floating.
We found that with this configuration, it cannot guarantee 100% that EPWM5 is synchronized (after synchronization, the counter resets to 0).
In the figure below, the green waveform is the direct output of EPWM5, the yellow signals are GPIO30 and GPIO31, where GPIO30 directly syncs EPWM5 to generate a reset event.
However, the waveform occasionally shows sync failures, causing to lose pulses. This abnormality occurs only sporadically.
The customer is concerned that the issue is caused by the pulse being too short, but I checked the TRM, and the event is triggered by the edge. I also had the customer configure GPIO30 and GPIO31 to 6 samples, yet the issue still exists.
We kindly request confirmation on the following points:
1. With this configuration, is it reliable to use a single-CLK pulse event as SYNCI? If it is not reliable, what is the minimum pulse width required for SYNCI?
2. If the pulse time does not affect EPWM synchronization, what could be the possible reason for this issue?
Thanks!
Best regards,
Julia
