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Part Number: TMS320F28388D
Other Parts Discussed in Thread: SYSCONFIG
I would like to secure the µC by access with debugger by similar to Code Security Passwort in like e.g. in F280X- Series. I read that I have to use the OTP section, but I don't understand exactly what to do. Therefore and because it is an OTP-Section, I would like to have some advice where to start. Is there maybe an example code available ?
Thank you in advances!
I Markus, I would recommend consulting the DCSM Security Tool application note and the DCSM video series to gain an understanding on how to program the OTP via SysConfig. Let me know if you have additional questions
Okay, thanks. Is my understanding correct, that If I want to secure only one core of the µC, that I need one Zone?
Hello,
I tried it, but it failed. I have now always error: C28xx_CPU1: Error connecting to the target: (Error -1156 @ 0x0) Device may be operating in low-power mode. Do you want to bring it out of this mode? Choose 'Yes' to force the device to wake up and retry the operation. Choose 'No' to retry the operation without waking the device. (Emulation package 9.12.0.00150)
This is my asm and my cmd file. What is the error?
;----------------------------------------------------------------------
; Zone 1
;----------------------------------------------------------------------
.sect "dcsm_otp_z1_linkpointer"
.retain
.long 0x00003FFE
.long 0x00003FFE
.long 0x00003FFE
.sect "dcsm_otp_z1_jlm_enable"
.retain
.long 0xFFFF000F ;Z1OTP_JLM_ENABLE
;; .sect "dcsm_otp_z1_jtag_pswdh"
;; .retain
;; .long 0x4BFFFFFF ;Z1OTP_JTAGPSWDH0
;; .long 0x3FFFFFFF ;Z1OTP_JTAGPSWDH1
;;
;; .sect "dcsm_otp_z1_cmac_key"
;; .retain
;; .long 0x00000000 ;Z1OTP_CMACKEY0
;; .long 0x00000000 ;Z1OTP_CMACKEY1
;; .long 0x00000000 ;Z1OTP_CMACKEY2
;; .long 0x00000000 ;Z1OTP_CMACKEY3
;;
.sect "dcsm_otp_z1_pswdlock"
.retain
.long 0xFB7FFFF0
.sect "dcsm_otp_z1_crclock"
.retain
.long 0x7FFFFFFF
;; .sect "dcsm_otp_z1_gpreg"
;; .retain
;; .long 0x5AFF4854 ;Z1OTP_GPREG1 = Z1_BOOTPIN
;; .long 0x5AFFFF3F ;Z1OTP_GPREG2
;; .long 0x00000000 ;Z1OTP_GPREG3 = Z1OTP_BOOTDEF_LOW
;; .long 0xFFFFFFFF ;Z1OTP_GPREG4 = Z1OTP_BOOTDEF_HIGH
.sect "dcsm_zsel_z1"
.retain
.long 0xFFFFFFFF ;Z1OTP_CSMPSWD0 (LSW of 128-bit password)
.long 0x4D7FFFFF ;Z1OTP_CSMPSWD1
.long 0xFFFFFFFF ;Z1OTP_CSMPSWD2
.long 0xFFFFFFF5 ;Z1OTP_CSMPSWD3 (MSW of 128-bit password)
.long 0x05555555 ;Z1OTP_GRABSECT1
.long 0x05555555 ;Z1OTP_GRABSECT2
.long 0x05555555 ;Z1OTP_GRABSECT3
.long 0x00055555 ;Z1OTP_GRABRAM1
.long 0x55555505 ;Z1OTP_GRABRAM2
.long 0x00055555 ;Z1OTP_GRABRAM3
.long 0x3FFF3FFF ;Z1OTP_EXEONLYSECT1
.long 0x00003FFF ;Z1OTP_EXEONLYSECT2
.long 0xFFC303FF ;Z1OTP_EXEONLYRAM1
.long 0xFFFFFFFF ;Reserved
.long 0xFFFFFFFF ;Z1OTP_JTAGPSWDL0
.long 0x27FFFFFF ;Z1OTP_JTAGPSWDL1
;----------------------------------------------------------------------
; For code security operation,after development has completed, prior to
; production, all other zone select block locations should be programmed
; to 0x0000 for maximum security.
; If the first zone select block at offset 0x10 is used, the section
; "dcsm_rsvd_z1" can be used to program these locations to 0x0000.
; This code is commented out for development.
; .sect "dcsm_rsvd_z1"
; .loop (1e0h)
; .int 0x0000
; .endloop
;----------------------------------------------------------------------
; Zone 2
;----------------------------------------------------------------------
;; .sect "dcsm_otp_z2_linkpointer"
;; .retain
;; .long 0x00003FFF
;; .long 0x00003FFF
;; .long 0x00003FFF
;;
;; .sect "dcsm_rsvd_z2"
;; .retain
;; .long 0xFFFFFFFF ;Reserved
;; .sect "dcsm_otp_z2_pswdlock"
;; .retain
;; .long 0x1F7FFFFF
;;
;; .sect "dcsm_otp_z2_crclock"
;; .retain
;; .long 0x3FFFFFFF
;;
;; .sect "dcsm_otp_z2_gpreg"
;; .retain
;; .long 0x5AFF4854 ;Z2OTP_GPREG1 = Z2_BOOTPIN
;; .long 0x5AFFFF3F ;Z2OTP_GPREG2
;; .long 0x00000000 ;Z2OTP_GPREG3 = Z2OTP_BOOTDEF_LOW
;; .long 0xFFFFFFFF ;Z2OTP_GPREG4 = Z2OTP_BOOTDEF_HIGH
;; .sect "dcsm_rsvd1_z2"
;; .retain
;; .long 0xFFFFFFFF ;Reserved
;; .long 0xFFFFFFFF ;Reserved
;;
;; .sect "dcsm_zsel_z2"
;; .retain
;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD0 (LSW of 128-bit password)
;; .long 0x1F7FFFFF ;Z2OTP_CSMPSWD1
;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD2
;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD3 (MSW of 128-bit password)
;;
;; .long 0x0AAAAAAA ;Z2OTP_GRABSECT1
;; .long 0x0AAAAAAA ;Z2OTP_GRABSECT2
;; .long 0x0AAAAAAA ;Z2OTP_GRABSECT3
;; .long 0x000AAAAA ;Z2OTP_GRABRAM1
;; .long 0xAAAAAA0A ;Z2OTP_GRABRAM2
;; .long 0x000AAAAA ;Z2OTP_GRABRAM3
;;
;; .long 0x3FFF3FFF ;Z2OTP_EXEONLYSECT1
;; .long 0x00003FFF ;Z2OTP_EXEONLYSECT2
;; .long 0xFFC303FF ;Z2OTP_EXEONLYRAM1
;; .long 0xFFFFFFFF ;Reserved
;; .long 0xFFFFFFFF ;Reserved
;; .long 0xFFFFFFFF ;Reserved
;----------------------------------------------------------------------
; For code security operation,after development has completed, prior to
; production, all other zone select block locations should be programmed
; to 0x0000 for maximum security.
; If the first zone select block at offset 0x10 is used, the section
; "dcsm_rsvd_z2" can be used to program these locations to 0x0000.
; This code is commented out for development.
; .sect "dcsm_rsvd_z2"
; .loop (1e0h)
; .int 0x0000
; .endloop
MEMORY
{
BEGIN : origin = 0x080000, length = 0x000002 //BEGIN is used for the "boot to Flash" bootloader mode
BOOT_RSVD : origin = 0x000002, length = 0x0001AE //Part of M0, BOOT rom will use this for stack
RAMM0 : origin = 0x0001B0, length = 0x000250
RAMM1 : origin = 0x000400, length = 0x000400
RAMD0 : origin = 0x00C000, length = 0x000800
RAMD1 : origin = 0x00C800, length = 0x000800
RAMLS0_7 : origin = 0x008000, length = 0x004000
//RAMLS0 : origin = 0x008000, length = 0x000800
//RAMLS1 : origin = 0x008800, length = 0x000800
//RAMLS2 : origin = 0x009000, length = 0x000800
//RAMLS3 : origin = 0x009800, length = 0x000800
//RAMLS4 : origin = 0x00A000, length = 0x000800
//RAMLS5 : origin = 0x00A800, length = 0x000800
//RAMLS6 : origin = 0x00B000, length = 0x000800
//RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1 : origin = 0x00E000, length = 0x001000
RAMGS2 : origin = 0x00F000, length = 0x001000
RAMGS3 : origin = 0x010000, length = 0x001000
RAMGS4 : origin = 0x011000, length = 0x001000
RAMGS5 : origin = 0x012000, length = 0x001000
RAMGS6 : origin = 0x013000, length = 0x001000
RAMGS7 : origin = 0x014000, length = 0x001000
RAMGS8_11 : origin = 0x015000, length = 0x004000
RAMGS12_15 : origin = 0x019000, length = 0x004000
// RAMGS15 : origin = 0x01C000, length = 0x001000
FLASH0 : origin = 0x080002, length = 0x001FFE
FLASH1 : origin = 0x082000, length = 0x002000
FLASH2 : origin = 0x084000, length = 0x002000
FLASH3 : origin = 0x086000, length = 0x002000
FLASH4 : origin = 0x088000, length = 0x008000
FLASH5 : origin = 0x090000, length = 0x008000
FLASH6 : origin = 0x098000, length = 0x008000
FLASH7 : origin = 0x0A0000, length = 0x008000
FLASH8 : origin = 0x0A8000, length = 0x008000
FLASH9 : origin = 0x0B0000, length = 0x008000
FLASH10 : origin = 0x0B8000, length = 0x002000
FLASH11 : origin = 0x0BA000, length = 0x002000
FLASH12 : origin = 0x0BC000, length = 0x002000
//FLASH13 : origin = 0x0BE000, length = 0x002000
DATAFLASH : origin = 0x0BE000, length = 0x002000
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
CPUTOCMRAM : origin = 0x039000, length = 0x000200
CMTOCPURAM : origin = 0x038000, length = 0x000200
CPUTOCMRAM_ECAT : origin = 0x039200, length = 0x000400
CMTOCPURAM_ECAT : origin = 0x038200, length = 0x000400
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
IQTABLES : origin = 0x3E9402, length = 0x00166D
RESET : origin = 0x3FFFC0, length = 0x000002
}
SECTIONS
{
codestart : > BEGIN, ALIGN(4)
.text : >> FLASH1 | FLASH2 | FLASH3 | FLASH4, ALIGN(4)
.cinit : > FLASH1 | FLASH2 | FLASH3 | FLASH4 | FLASH5 ALIGN(4)
.switch : > FLASH1, ALIGN(4)
.reset : > RESET, TYPE = DSECT //not used
.stack : > RAMGS0
flashdata : > DATAFLASH
i_table : > RAMGS8_11
i_table1 : > RAMGS12_15
#if defined(__TI_EABI__)
.init_array : > FLASH1, ALIGN(8)
.bss : > RAMLS0_7
.bss:output : > RAMLS0_7
.bss:cio : > RAMLS0_7
.data : > RAMLS0_7
.sysmem : > RAMLS0_7
.const : > FLASH6, ALIGN(8) //Initalized sections go in Flash
#else
.pinit : > FLASH1, ALIGN(8)
.ebss : > RAMLS0_7
.esysmem : > RAMLS0_7
.cio : > RAMLS0_7
.econst : >> FLASH6 | FLASH7, ALIGN(4) //Initalized sections go in Flash
#endif
ramgs0 : > RAMGS0, type=NOINIT
ramgs1 : > RAMGS1, type=NOINIT
MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT
MSGRAM_CPU1_TO_CM : > CPUTOCMRAM, type=NOINIT
MSGRAM_CM_TO_CPU : > CMTOCPURAM, type=NOINIT
MSGRAM_CPU_TO_CM_ECAT : > CPUTOCMRAM_ECAT, type=NOINIT
MSGRAM_CM_TO_CPU_ECAT : > CMTOCPURAM_ECAT, type=NOINIT
//IQmath : > FLASH12
//IQmathTables : > FLASH12//IQTABLES
//IQmathTablesRam : > FLASH12
Filter_RegsFile : > RAMGS0 //The following section definition are for SDFM examples
Filter1_RegsFile : > RAMGS1, fill=0x1111
Filter2_RegsFile : > RAMGS2, fill=0x2222
Filter3_RegsFile : > RAMGS3, fill=0x3333
Filter4_RegsFile : > RAMGS4, fill=0x4444
Difference_RegsFile : >RAMGS5, fill=0x3333
GROUP
{
.TI.ramfunc IQmathTablesRam
// TODO_MB 17.07.2024
// Rausgenommen Da dies kein passender Abschnitt ist
// { -l F2838x_C28x_FlashAPI.lib
// //-l IQmath_fpu32_eabi.lib
// }
} LOAD = FLASH3,
RUN = RAMLS0_7,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
}
MEMORY
{
/* Z1 OTP. Z1 password locations / Flash and RAM partitioning */
DCSM_OTP_Z1_LINKPOINTER : origin = 0x78000, length = 0x00006
DCSM_OTP_Z1_JLM_ENABLE : origin = 0x78006, length = 0x00002
DCSM_OTP_Z1_GPREG : origin = 0x78008, length = 0x00008
DCSM_OTP_Z1_PSWDLOCK : origin = 0x78010, length = 0x00002
DCSM_OTP_Z1_CRCLOCK : origin = 0x78012, length = 0x00002
DCSM_OTP_Z1_JTAG_PSWDH : origin = 0x78014, length = 0x00004
DCSM_OTP_Z1_CMAC_KEY : origin = 0x78018, length = 0x00008
/* DCSM Z1 Zone Select Contents (!!Movable!!) */
DCSM_ZSEL_Z1_P0 : origin = 0x78040, length = 0x000020
/* Z2 OTP. Z2 password locations / Flash and RAM partitioning */
DCSM_OTP_Z2_LINKPOINTER : origin = 0x78200, length = 0x00006
DCSM_OTP_Z2_RSVD : origin = 0x78206, length = 0x00002
DCSM_OTP_Z2_GPREG : origin = 0x78208, length = 0x00008
DCSM_OTP_Z2_PSWDLOCK : origin = 0x78210, length = 0x00002
DCSM_OTP_Z2_CRCLOCK : origin = 0x78212, length = 0x00002
DCSM_OTP_Z2_RSVD1 : origin = 0x78214, length = 0x0000C
/* DCSM Z2 Zone Select Contents (!!Movable!!) */
DCSM_ZSEL_Z2_P0 : origin = 0x78220, length = 0x000020
}
SECTIONS
{
dcsm_otp_z1_linkpointer : > DCSM_OTP_Z1_LINKPOINTER
dcsm_otp_z1_gpreg : > DCSM_OTP_Z1_GPREG
dcsm_otp_z1_pswdlock : > DCSM_OTP_Z1_PSWDLOCK
dcsm_otp_z1_crclock : > DCSM_OTP_Z1_CRCLOCK
dcsm_otp_z1_jlm_enable : > DCSM_OTP_Z1_JLM_ENABLE
dcsm_otp_z1_jtag_pswdh : > DCSM_OTP_Z1_JTAG_PSWDH
dcsm_otp_z1_cmac_key : > DCSM_OTP_Z1_CMAC_KEY
dcsm_zsel_z1 : > DCSM_ZSEL_Z1_P0
dcsm_otp_z2_linkpointer : > DCSM_OTP_Z2_LINKPOINTER
dcsm_otp_z2_gpreg : > DCSM_OTP_Z2_GPREG
dcsm_otp_z2_pswdlock : > DCSM_OTP_Z2_PSWDLOCK
dcsm_otp_z2_crclock : > DCSM_OTP_Z2_CRCLOCK
dcsm_rsvd_z2 : > DCSM_OTP_Z2_RSVD
dcsm_rsvd1_z2 : > DCSM_OTP_Z2_RSVD1
dcsm_zsel_z2 : > DCSM_ZSEL_Z2_P0
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Hello,
The files you've shown, did you successfully program this onto the device?
Is the device in wait boot or Flash boot? You may need to put the device into wait boot to obtain JTAG access.
Thank you,
Luke
