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F29H850TU: how to setup ePWM instances using SysConfig to be in sync and aligned

Part Number: F29H850TU
Other Parts Discussed in Thread: SYSCONFIG

Hello,

Im working with a F29H850TU on a user defined pcb on a motorcontrol application. As a basis I'm using servo_drive_qep_LMG2100 out of MotorControl SDK1.0.0.0.

As described in the MotorCorntrol SDKW manual, starting point ist DMC_BUILDLEVEL  DMC_LEVEL_1. To get the code running and doing something meaningfull with my hardware I used SysConfig to set up pin mapping for my application.

When running the code on the target with DMC_LEVEL_1 I'm able to observe the 3 ePWMa outputs (channels [2,3,4]; for better visibillity, the have a different offset while scoping): 
DS1Z_QuickPrint1.png

my questions

  1. Where is the phase shift of the PWMs comming from?
  2. How do I setup the ePWM channels in SysConfig so they are in sync/aligned?
    2.1 Where/how do I find the registers to be setup like describe in "30.4.3.2 Time-Base Clock Synchronization" of the f29h85x - TechnicalReferenceManual (TBCLK, TBCLKSYNC, PCLKCRx) in SysConfig? How are they namend in SysConfig?

Thank you,
Christian

  • Hi Christian,

    I can help answer queries related to the PWM register configurations.

    • Where is the phase shift of the PWMs comming from?

    Looking at the ePWM registers, these are the following registers which will tell you what's causing a potential phase shift. 

    1. Is Phase shift enabled? 
      1. Yes if TBCTL.PHSEN = 1
      2. No if TBCTL.PHSEN = 0. If PHSEN is set to 0, you should not see any phase shift assuming the Action Qualifier registers and the counter compare registers are the same.
    2. Is TBPHS written to?
      1. If TBPHS > 2, then there will be phase shift. For example if TBPHS = 300, then whenever the SYNC event occurs the TBCTR will be set to 300.
      2. If TBPHS = 0, ePWMs will be not fully synchronized see the screenshot below.
      3. If TBPHS = 1 or TBPHS = 2, ePWMs are fully synchronized see the screenshot below depending on EPWMCLK.
    3. What is the sync input?
      1. EPWMSYNCINSEL will determine the source of EPWMxSYNCI signal
    How do I setup the ePWM channels in SysConfig so they are in sync/aligned?

    For setting up Sysconfig so that they are sync/aligned we have a synchronization example that showcases what needs to be configured for synchronization if using TBPHS.

    C:\ti\f29h85x-sdk_1_02_00_00\examples\driverlib\single_core\epwm\epwm_ex3_synchronization

    This application note also goes over the basics of setting it up within Sysconfig.

    https://www.ti.com/lit/an/sprad12a/sprad12a.pdf

    1. 2.1 Where/how do I find the registers to be setup like describe in "30.4.3.2 Time-Base Clock Synchronization" of the f29h85x - TechnicalReferenceManual (TBCLK, TBCLKSYNC, PCLKCRx) in SysConfig? How are they namend in SysConfig?

    Within SysConfig, all peripherals get enabled by defaults. You can also check device.c to see the code that enabled each peripheral.

    Best regards,

    Ryan Ma

  • Hello, 

    thank you for the answer!

    With the linked application note and your hints, at least I got a configuration using SysConfig in a way, my three ePWMs are in synch now.

    When I was doing the setting

    on all three ePWMs the output is now in synch:


    Your hint 2.c. encoureged me to actually ENABLE a phseshift to make the sync happen - I would have never come to this idea without your hint. (Even more, because I'm missing the link between the describtion of the datasheet/referencemanual/application notes where allways register names are used and these register names can't be found in sysconfig...)