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TMS320F28379D: Interrupt propagating

vincent liebart
Intellectual 600 points

Part Number: TMS320F28379D

Hello,

I am familiair with interrupts on this device. But I did not ever dare to set or clear the INTM bit while my application is running.... my question is simple: is there any risk to miss an interrupt signal when using DINT and EINT, or are all the pending interrupts lached, thanks to a pulse generator between IER and INTM on this scheme:

image.png

(I mean, since we did not entered into the interrupt, IER is not clear and we will enter in the interrupt as soon as granted) 

 

  • 0
    TI__Mastermind 21850 points

    Hi Vincent,

    The PIEIFR and IFR statuses will be latched as long as the interrupt doesn’t propagate fully to the CPU. These are cleared upon entering the ISR. If more than one interrupt on the same line is triggered before the previous is propagated to (aka “spurious” interrupts), the later interrupts will be lost. The PIE can only have one interrupt latched on a specific line at a time.

    Please upvote this response if it answers your question. 

    Best Regards,

    Delaney