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Understanding ADC Channel selection register in 28335

Kuldeep Kumar Mynampati
Intellectual 320 points


Hi,

I am working 28335 processor. I have set up by ADC in Simultaneous and cascaded mode.

                                       
AdcRegs.ADCMAXCONV.all          = 7;      // A/D conversions                       
                                                                                   
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;  /* Setup conv from ADCINA0 and ADCINB0 */  
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;  /* Setup conv from ADCINA1 and ADCINB1 */  
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;  /* Setup conv from ADCINA2 and ADCINB2 */  
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;  /* Setup conv from ADCINA3 and ADCINB3 */  
                                                                                   
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4;  /* Setup conv from ADCINA4 and ADCINB4 */  
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5;  /* Setup conv from ADCINA5 and ADCINB5 */  
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6;  /* Setup conv from ADCINA6 and ADCINB6 */  
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7;  /* Setup conv from ADCINA7 and ADCINB7 */  


As per the document, ADCRESULT are stored as follows.

A0 -> ADCRESULT0
B0 -> ADCRESULT1

..

A7 -> ADCRESULT14
B7 -> ADCRESULT15

Is there any way that I can swap my B1 and B5 in ADCCHSELSEQ1 & ADCCHSELSEQ2 register. I did not understand properly and
always messing up. Can anyone help me with a few lines of comments or code?


Regards,
KK

  • 0
    TI__Expert 8500 points

    KK,

    If I understand your question you are asking if ADCINA1 can be paired with ADCINB5 and if ADCINA5 can be paired (sampled together) with ADCINB1 when in simultaneous sampling mode. I'm sorry, but the answer is no. ADCINAx is always paired with ADCINBx where 'x' is the same in the two names.

    Alternatively, maybe you are asking if the order within the sequence can be rearranged. If that is your question then the answer is yes. As stated above the pairs must remain as defined, but you do not have to associate ADCINAx/Bx with a certain sequencer slot. You could do:

    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;  /* Setup conv from ADCINA0 and ADCINB0 */  
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x5;  /* Setup conv from ADCINA5 and ADCINB5 */  
    AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;  /* Setup conv from ADCINA2 and ADCINB2 */  
    AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;  /* Setup conv from ADCINA3 and ADCINB3 */  
                                                                                       
    AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4;  /* Setup conv from ADCINA4 and ADCINB4 */  
    AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x1;  /* Setup conv from ADCINA1 and ADCINB1 */  
    AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6;  /* Setup conv from ADCINA6 and ADCINB6 */  
    AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7;  /* Setup conv from ADCINA7 and ADCINB7 */ 

    and the results would be:

    A0 -> ADCRESULT0
    B0 -> ADCRESULT1
    A5 -> ADCRESULT2
    B5 -> ADCRESULT3
    ...
    A1 -> ADCRESULT10
    B1 -> ADCRESULT11
    ...
    A7 -> ADCRESULT14
    B7 -> ADCRESULT15