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TMS320F28P659DH-Q1: Flashing a multi core example project

Part Number: TMS320F28P659DH-Q1
Other Parts Discussed in Thread: C2000WARE, UNIFLASH

Hello team,

what are the correct steps to flash a multi core example project and run it from flash?

This is for CCS20.3.1 and C2000Ware 6.00.00.0

We are able to successfully debug the multi core projects from RAM - with these steps:

  1. Start project less debug
  2. Load cpu1.out
  3. Run cpu1.out
  4. Load cpu2.out
  5. Run cpu2.out

When we change the build config to Flash and then try to load both .out, we run into issues.

So I would like to clarify the correct order of steps to load both .outs and run them from flash?

Thanks!

  • Hi Til,

    we run into issues.

    Can you please help clarify what kind of issues you are facing when you switch to a Flash build?

    Are you changing the Boot mode pins to flash boot configuration?

    Best Regards,

    Marlyn

  • Hello Marlyn,

    I believe that after flashing CPU1, when flashing CPU2 there is a writing issue on flash bank 0.

    Let me get more details on this.

    In the meantime, do you have a document describing the preferred way of flashing a multi core project?

    Thanks!

  • Hi Til,

    Let me get more details on this.

    That would be great thank you.

    In the meantime, do you have a document describing the preferred way of flashing a multi core project?

    The steps you have outlined in your post are the correct sequence of steps however for a Flash configuration you will also need to modify the Flash Settings for CPU1/CPU2 before you execute the steps above to load the programs for CPU1/CPU2.

    Depending on the project you are running, there should be instructions in the comments of the main.c file. Below, as an example, are the additional comments for the multi-core LED Blinky example:

    This example demonstrates how to blink a LED using CPU1 and blink another
    //! LED using CPU2 (led_ex1_blinky_cpu2.c).
    //!
    //! \note In the default CPU2 linker cmd file, GS4, FLASH_BANK3 and FLASH_BANK4
    //! are used for allocating various CPU2 sections. The CPU1 application
    //! assigns the ownership of these memory regions to CPU2 by using SysConfig.
    //! Please note that CPU2 .out file can be loaded only after CPU1 completes
    //! this configuration.
    //!
    //! The erase setting (CPU1/CPU2 On-Chip Flash -> erase setting) needs to be
    //! configured as selected banks only (Choose the corresponding BANKS allocated
    //! for CPUs) or necessary sectors only before loading CPU1/CPU2.out file
    //! (This is applicable only for FLASH configuration)

    Thus, when you go to the Flash Settings make sure to make the following changes:

    Best Regards,

    Marlyn

  • Thanks Marlyn, that helps already.

    How can I access the Flash Settings as showed above inside CCS?

    I saw that I can access them in Uniflash, but did not find where to see the settings in CCS.

  • Hi Til,

    In CCS, in the debug view, you can right click on a core and then select properties. There should be a window that pops-up and you can select the Flash settings within the 'Category' drop down.

    Below screenshots are for another device but the same steps apply:

    Best Regards,
    Marlyn