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Original question:

TMS320F280037C: MCAN clock

TMS320F280039C: MCAN Bit timings

Shreevalya S N
Prodigy 60 points

Part Number: TMS320F280039C

while configuring the MCAN bit timing I gave the MCAN clk = 40MHz and iam changing the baud rate from 500k to 8MBps upto 5Mbps it is working like nominal = 1MBps and data = 5MBps and for nominal = 1MBps and data = 8MBps what is the suitable clk and bit time parameters i need to select to configure these baud rates for CAN FD.

switch (bit)
    {
        case 0: /* 125 kbps */
            bitTimes_myMCAN0.nomRatePrescalar = 15;
            break;
        case 1: /* 250 kbps */
            bitTimes_myMCAN0.nomRatePrescalar = 7;
            break;
        case 2: /* 500 kbps */
            bitTimes_myMCAN0.nomRatePrescalar = 3;
            break;
        case 3: /* 1 Mbps */
            bitTimes_myMCAN0.nomRatePrescalar = 1;
            break;
        case 4:
            bitTimes_myMCAN0.nomRatePrescalar  = 3;

            bitTimes_myMCAN0.dataRatePrescalar = 3;
            break;
        case 5:
            bitTimes_myMCAN0.nomRatePrescalar  = 3;

            bitTimes_myMCAN0.dataRatePrescalar = 1;
            break;
        case 6:
            bitTimes_myMCAN0.nomRatePrescalar  = 1;

            bitTimes_myMCAN0.dataRatePrescalar = 1;
            bitTimes_myMCAN0.dataTimeSeg1      = 4;
            bitTimes_myMCAN0.dataTimeSeg2      = 3;
            bitTimes_myMCAN0.dataSynchJumpWidth= 3;
            break;
        case 7:
            //SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_2);

            bitTimes_myMCAN0.nomRatePrescalar   = 0x1U;
            bitTimes_myMCAN0.nomTimeSeg1        = 0x9U;
            bitTimes_myMCAN0.nomTimeSeg2        = 0x8U;
            bitTimes_myMCAN0.nomSynchJumpWidth  = 0x8U;

            bitTimes_myMCAN0.dataRatePrescalar = 0x0U;
            bitTimes_myMCAN0.dataTimeSeg1      = 0x5U;
            bitTimes_myMCAN0.dataTimeSeg2      = 0x0U;
            bitTimes_myMCAN0.dataSynchJumpWidth= 0x1U;

            break;

        case 8:
           // SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_1);
            bitTimes_myMCAN0.nomRatePrescalar   = 0x4U;
            bitTimes_myMCAN0.nomTimeSeg1        = 0x4U;
            bitTimes_myMCAN0.nomTimeSeg2        = 0x1U;
            bitTimes_myMCAN0.nomSynchJumpWidth  = 0x1U;

            bitTimes_myMCAN0.dataRatePrescalar = 0x0U;
            bitTimes_myMCAN0.dataTimeSeg1      = 0x1U;
            bitTimes_myMCAN0.dataTimeSeg2      = 0x1U;
            bitTimes_myMCAN0.dataSynchJumpWidth= 0x1U;

            break;

        default:
            break;
    }

  • +1
    TI__Mastermind 40140 points

    Hi Sheervalya,

    The MCAN clock would be device SYSCLK divided by the MCAN clock divider.  F28003x SYSCLK is 120MHz so to attain 40MHz MCAN clock, MCAN clock divider should be 3.  This would be API call SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_3).

    Bit timing for both nominal and data phases are roughly calculated as:

         bit time = (MCAN clk / MCAN clock divider) / [(bit time prescaler + 1) / (tseg1 + tseg2 + 3) ]

    For 1Mhz nom and 5Mhz data rate, you can use below bit timing parameters assuming MCAN clock is 40MHz:

        nom bit time prescaler = 1

        nom tseg1 = 9 

        nom tseg2 = 8

       data bit time prescaler = 0

       data tseg1 = 3

       data tseg2 =2

    For 1Mhz nom and 8Mhz data rate, you can use below bit timing parameters assuming MCAN clock is 40MHz:

        nom bit time prescaler = 1

        nom tseg1 = 9 

        nom tseg2 = 8

       data bit time prescaler = 0

       data tseg1 = 1

       data tseg2 =1

    Regards,

    Joseph