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TMS320F28388D: Issue in setting GPIO pins as output

Part Number: TMS320F28388D

I wrote a small code in CCS, to make device send data out on these pins gpio58 gpio59 gpio60 gpio61 gpio62 gpio63 gpio64 gpio65. Here is the 'flashapi_ex1_programming.c' file.

flashapi_ex1_programming.c 

My build is successful. I have downloaded the bootcode to the device. However, I see that the device is sending all FFs.

Small snippet.

void sendbyte(uint32_t _FlashSendData)
{
    uint32_t _FlashOffset;
    //_FlashOffset = _FlashSendData;    
    while(GPIO_readPin( 92));//92 is pulled low in DPL.

    //Writing Data
    _FlashOffset =(_FlashSendData>>7) & 1;    
    GPIO_writePin(58, _FlashOffset);

    _FlashOffset =(_FlashSendData>>6) & 1;    
    GPIO_writePin(59, _FlashOffset);

    _FlashOffset =(_FlashSendData>>5) & 1;    
    GPIO_writePin(60, _FlashOffset);

    _FlashOffset =(_FlashSendData>>4) & 1;    
    GPIO_writePin(61, _FlashOffset);

    _FlashOffset =(_FlashSendData>>3) & 1;    
    GPIO_writePin(62, _FlashOffset);

    _FlashOffset =(_FlashSendData>>2) & 1;    
    GPIO_writePin(63, _FlashOffset);

    _FlashOffset =(_FlashSendData>>1) & 1;    
    GPIO_writePin(64, _FlashOffset);

    _FlashOffset =(_FlashSendData>>0) & 1;    
    GPIO_writePin(65, _FlashOffset);

   

    //Writing Data
    //_FlashOffset = ((_FlashSendData & 0xFC)>>0x02);
    //GPIO_writePortData(GPIO_PORT_B, _FlashOffset);
    //_FlashOffset = ((_FlashSendData & 0x03)<<0x0E);
    //GPIO_writePortData(GPIO_PORT_C, _FlashOffset);

    GPIO_writePin(91,  0);
    while(!GPIO_readPin( 92));//92 is pulled high in DPL after reading the sent data
    GPIO_writePin( 91,  1);
}
 
I am calling sendbyte() inside void main(). The handshake seems to be working good, but the data received is always FFs. Can you please help us debug this issue. Thanks!
  • Hello,

    You drive the 8 data GPIOs and immediately pull GPIO91 low. On a 200 MHz C28x this can be only a few tens of ns of setup which is easy to miss on the receiver. I would add a small setup/hold delay. Also, you initialized 58…65 to 1 and also enable internal pull-ups. If the receiver samples before your strobe or if your lines can’t be driven LOW strongly enough, you’ll read 0xFF. For push-pull outputs, use GPIO_PIN_TYPE_STD (no pull) and start them at 0.

    Your comments say “92 is pulled low in DPL”, but your first wait is while(GPIO_readPin(92)); (wait while HIGH). That’s fine only if 92 truly sits HIGH when not ready. Make sure the strobe/ack polarity matches the other side and add a timeout so you don’t hang forever.

    Finally, writing 8 pins back-to-back is fine, but the receiver must sample only after all pins are valid. The strobe delay fixes this. If you need perfect simultaneity, use port-wide writes.

    Best Regards,

    Masoud

  • I did all mentioned above, and still dont see bootcode running.

    Can you help confirm few things?

    We are doing a build and getting the .s19 file. To get these, we do the follwoing setting in the properties. Please confirm the if they are correct.

    We are using parallel boot mode. So is the below setting correct?

    Before we download the bootcode to the device, we set the mode selection pins GPIO72 and 84 to low. After we download the bootcode to the device, do we neet to set the pins to high?

    Is there anything we need to do addtionally so that the downloaded bootcode will run and we can see the data sent from the device on the receiver end?

  • Hello Vigita,

    GPIO72 and GPIO84 are only sampled around reset to decide which boot mode to enter. As long as they are low when XRSn is released, the device will enter Parallel I/O boot (mode 0). After the boot ROM makes that decision, changing those pins has no effect on the boot that is already in progress.

    I'll assign this thread to our Boot expert to help better here.

    Best regards,

    Masoud

  • Hello,

    After we download the bootcode to the device, do we neet to set the pins to high?

    Once the boot pins are sampled and the intended bootloader is selected (obeying the boot pin hold time), you can use the GPIOs for alternative functionality.

    Source: F2838x Data Sheet

    Please refer to Section 5.7.7.2.4 Parallel Boot Mode in the TRM for details on the protocol and the Parallel GPIO boot 8-bit data stream.

    Best,

    Matt