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TMS320F28P650SK: Request for Guidance on Using Multiple DMA Channels with UART on TMS320F28P650SK

Part Number: TMS320F28P650SK
Other Parts Discussed in Thread: SYSCONFIG

Dear TI Support Team,

I am currently working with the TMS320F28P650SK device and would like to configure UART communication using six DMA channels as follows:

UARTA: DMA for both RX and TX

UARTB: DMA for both RX and TX

SCIA and SCIB: DMA for RX only

My plan is to modify the provided example uart_ex4_loopback_dma to meet these requirements.

Could you please provide guidance or documentation on how to adapt the example for this configuration?

Thank you very much for your support.

Best regards, Sungjoo 

  • Hi Sungjoo,

    In F28P65X, the DMA does not have access to the SCI registers. You should be able to use it with the UART instances as expected using the example for reference. Let me know if you have any other questions. 

    Regards,

    Arnav

  • Dear Arnav Menon R

    Thasnk for your reponse.

    Is it possible to configure the DMA Databus width to 8-bit?

    In my setup:

    TX buffer is filled with incrementing data (0, 1, 2, 3, 4 …).
    RX buffer shows only the first few values correctly (0, 1, 2), but then the rest are zeros (0, 0, 0 …).

    Since the UART frame is configured as 8-bit (8N1), I believe the DMA should also transfer data in 8-bit units to ensure proper alignment.
    However, I noticed that the DMA is configured to transfer 16 bits at a time, and in SysConfig the Databus Width options only show:
    “DMA transfers 16 bits at a time”
    “DMA transfers 32bits at a time”


    There is no option to select 8-bit transfers.

    Could you please advise how I can configure the DMA to operate in 8-bit mode for both RX and TX channels

    , so that the UART loopback data is received correctly? Is there a workaround or specific setting I should apply in SysConfig or in the code?

    Thank you very much for your guidance.

    Best regards

  • Hi,

    The minimum bus width for the DMA is 16-bits. However, this should not be an issue for 8-bit transfers. The TX channel will just write the lower 8 bits of each element from the TX buffer into the UART Data register, and similarly for RX.

    The result you are seeing may be because of a mismatch between Burst Size / Transfer Size / FIFO Trigger Level. I would suggest going through the comments in uart_ex4_loopback_dma, as they explain in detail the relation between these configurations. If the issue persists, we can take a look at your configurations. 

    Regards,

    Arnav 

  • Hello.

    Thank you for your response.

    In the uart_ex4_loopback_dma.c example, I noticed that when BUFFER_SIZE is set to 32, everything works fine. However, when I increase BUFFER_SIZE to 1024, the RX buffer seems to store only values from 0 to 31.

    Could you please explain why this happens? Below is the code I used for testing.

    I look forward to your reply.

    Best regards,

    sjkim

    ------------------------------------ my test code -----------------------------------------

    #define UART_BUFFER_SIZE 2
    #define BUFFER_SIZE 1024//32

    uint16_t txData[BUFFER_SIZE];
    uint16_t rxData[BUFFER_SIZE];

    const void *txAddr = (const void *)txData;
    const void *rxAddr = (const void *)rxData;
    const void *drAddr = (const void *)(myUART0_BASE + UART_O_DR);

    void main(void)
    {
    while(1)
    {
    for(bufferIndex = 0; bufferIndex < BUFFER_SIZE; bufferIndex++)
    {
    txData[bufferIndex] = (bufferIndex & 0x00FF);
    rxData[bufferIndex]= 0;
    }

    DMA_startChannel(myDMA0_BASE);
    DMA_startChannel(myDMA1_BASE);

    while(!txDone || !rxDone);

    if(memcmp(txData, rxData, BUFFER_SIZE) == 0)
    {
    g_bResult = true;
    }
    else
    g_bResult = false;
    }
    }

  • Hi.

    Thank you for your response.

    Due to memory limitations, I want to use 8‑bit DMA Tx and Rx buffers instead of 16‑bit.
    uint8_t TxDma[1024]
    uint8_t RxDma[1024]

    Is there no way to do this?”

    Best regards,

    sjkim

  • Hi,

    The C28x is a 16-bit addressable CPU, so you cannot truly create variables at 8-bit word boundaries. What you can do is declare uint16_t arrays (of size 512) and use compiler intrinsics / bit manipulations to pack two 8-bit words into each array entry. I suggest going through this guide for the same.

    Regards,

    Arnav

  • Hello.

    Thank you for your response.

    In the uart_ex4_loopback_dma.c example, I noticed that when BUFFER_SIZE is set to 32, everything works fine. However, when I increase BUFFER_SIZE to 1024, the RX buffer seems to store only values from 0 to 31.

    Could you please explain why this happens? Below is the code I used for testing.

    I look forward to your reply.

    Best regards,

    sjkim

    ------------------------------------ my test code -----------------------------------------

    #define UART_BUFFER_SIZE 2
    #define BUFFER_SIZE 1024//32

    uint16_t txData[BUFFER_SIZE];
    uint16_t rxData[BUFFER_SIZE];

    const void *txAddr = (const void *)txData;
    const void *rxAddr = (const void *)rxData;
    const void *drAddr = (const void *)(myUART0_BASE + UART_O_DR);

    void main(void)
    {
    while(1)
    {
    for(bufferIndex = 0; bufferIndex < BUFFER_SIZE; bufferIndex++)
    {
    txData[bufferIndex] = (bufferIndex & 0x00FF);
    rxData[bufferIndex]= 0;
    }

    DMA_startChannel(myDMA0_BASE);
    DMA_startChannel(myDMA1_BASE);

    while(!txDone || !rxDone);

    if(memcmp(txData, rxData, BUFFER_SIZE) == 0)
    {
    g_bResult = true;
    }
    else
    g_bResult = false;
    }
    }

  • The DMA setup is performed via SysConfig, where you can see that both the TX and RX channels are configured with burst size as 2 and transfer size as 16, totaling 32 word transfers. You can tune these values for your new size of 1024 words, and you should see the full transfer occurring. (Refer to the comments in uart_ex4_loopback_dma.c for assistance in calculating your burst and transfer size)

    Regards,

    Arnav